The very last presentation at the 12th annual 3D Advanced Semiconductor Integration and Packaging conference was given by Hash Pakbaz, president and chief executive officer of SBA Materials, a developer of nanoporous and mesoporous materials for semiconductor manufacturing and other applications.
After apologizing for his lack of expertise in chip packaging, Pakbaz
laid out the case for using his Silicon Valley startup’s patented
Liquid Phase Self Assembly technology for designing siloxane-based
materials.
Based in San Jose, Calif., with an office in Albuquerque, N.M., SBA Materials has an impressive roster of investors – Intel Capital (through three rounds in two years), Samsung Venture Investment Corporation, Air Liquide Venture Capital, Tokyo Electron Venture Capital, Rock Hankin, William Cook (a co-founder and former CEO of the startup), Southern Cross Venture Partners, and Sun Mountain Capital. SBA Materials has not disclosed its total amount of venture funding, which extends over four rounds.
Materials with a low dielectric constant were first introduced more
than a decade ago, and the semiconductor industry migration to making
chips with 7-nanometer features will involve the integration of low-k
materials, Pakbaz said at the 3D ASIP conference.
SBA’s goals are to “maintain existing composition” and “avoid random
porosity,” Pakbaz said. With the LPSA technology, the company can offer
low-k materials that are “not ordered and not random,” he added.
The films are spin-coated on a substrate, then subjected to a soft
bake at 150 degrees C, according to Pakbaz. The resulting films can vary
in thickness from 60 nanometers to 2 microns, he said.
“Our material is nice and sharp,” Pakbaz asserted. “Our material is quite stable.”
While SBA’s uLK advanced electronic materials are aimed at
back-end-of-line and packaging applications in chip making, there are
“applications beyond BEOL,” Pakbaz said at the conference.
“We see great promise for the LPSA material platform, not just in
semiconductors, but also in various applications, including displays,”
Dong-Su Kim, a vice president of Samsung Ventures America, said in a
statement. He joined the SBA board of directors last year.
SBA has its material manufactured is Japan, Pakbaz noted, and it is working with imec in Belgium and Fraunhofer IPMS-CNT in Germany on development of its ultralow-k material.
Researchers
from the University of Glasgow have found a way to make swallowable
cameras more effective at detecting cancers of the throat and gut. These
tiny sensing systems have proven to be a valuable clinical alternative
to more intrusive imaging methods such as endoscopes.
Until
now, the systems, often known as video-pill, have relied on
illuminating patients’ innards using a small light source, restricting
clinicians to conclusions based on what they can see in the spectrum of
visible light.
The researchers from the University’s School of
Engineering have used an advanced semiconductor single-pixel imaging
technique to create fluorescent light for the first time to expand the
diagnostic capabilities of the video-pill.
Flurorescence imaging
is already a powerful diagnostic tool in medicine, capable of clearly
identifying in patients the rich blood supplies which support cancers
and help them to grow, but which can be missed by examination under
visible light. However, past fluorescence imaging technologies have been
expensive, bulky and consume substantial power, confining the technique
to laboratories and hospital examination rooms.
Research
associate, Dr Mohammed Al-Rawhani said: “We’ve confirmed in the lab the
ability of the system to image fluorescence ‘phantoms’ – mixtures of
flavins and haemoglobins which mimic closely how cancers are affected by
fluorescence in parts of the body like the intestines, the bowel and
the oesophagus.
“It’s a valuable new technique which could help
clinicians make fewer false positives and negatives in cancer diagnosis,
which could lead to more effective treatment in the future.”
Professor
David Cumming, the University of Glasgow’s chair of Electronic Systems,
said: “There’s still some way to go before it will be ready for
commercial production and clinical use, but we’re in early talks with
industry to bring a product to market. We’re also interested in
expanding the imaging capabilities of video-pill systems to new areas
such as ultrasound in the near future.”
- See more at:
http://www.newelectronics.co.uk/electronics-news/semiconductor-imaging-technique-improves-cancer-detection/111826/#sthash.fz9XTlwo.dpuf
Researchers
from the University of Glasgow have found a way to make swallowable
cameras more effective at detecting cancers of the throat and gut. These
tiny sensing systems have proven to be a valuable clinical alternative
to more intrusive imaging methods such as endoscopes.
Until
now, the systems, often known as video-pill, have relied on
illuminating patients’ innards using a small light source, restricting
clinicians to conclusions based on what they can see in the spectrum of
visible light.
The researchers from the University’s School of
Engineering have used an advanced semiconductor single-pixel imaging
technique to create fluorescent light for the first time to expand the
diagnostic capabilities of the video-pill.
Flurorescence imaging
is already a powerful diagnostic tool in medicine, capable of clearly
identifying in patients the rich blood supplies which support cancers
and help them to grow, but which can be missed by examination under
visible light. However, past fluorescence imaging technologies have been
expensive, bulky and consume substantial power, confining the technique
to laboratories and hospital examination rooms.
Research
associate, Dr Mohammed Al-Rawhani said: “We’ve confirmed in the lab the
ability of the system to image fluorescence ‘phantoms’ – mixtures of
flavins and haemoglobins which mimic closely how cancers are affected by
fluorescence in parts of the body like the intestines, the bowel and
the oesophagus.
“It’s a valuable new technique which could help
clinicians make fewer false positives and negatives in cancer diagnosis,
which could lead to more effective treatment in the future.”
Professor
David Cumming, the University of Glasgow’s chair of Electronic Systems,
said: “There’s still some way to go before it will be ready for
commercial production and clinical use, but we’re in early talks with
industry to bring a product to market. We’re also interested in
expanding the imaging capabilities of video-pill systems to new areas
such as ultrasound in the near future.”
- See more at:
http://www.newelectronics.co.uk/electronics-news/semiconductor-imaging-technique-improves-cancer-detection/111826/#sthash.fz9XTlwo.dpuf
Researchers from the University
of Glasgow have found a
way to make swallowable cameras more effective at detecting cancers of the
throat and gut. These tiny sensing systems have proven to be a valuable
clinical alternative to more intrusive imaging methods such as endoscopes.
Until now, the
systems, often known as video-pill, have relied on illuminating patients’
innards using a small light source, restricting clinicians to conclusions based
on what they can see in the spectrum of visible light.
The researchers from the University’s School of Engineering
have used an advanced semiconductor single-pixel imaging technique to create
fluorescent light for the first time to expand the diagnostic capabilities of
the video-pill.
Flurorescence imaging is already a powerful diagnostic tool in medicine,
capable of clearly identifying in patients the rich blood supplies which
support cancers and help them to grow, but which can be missed by examination
under visible light. However, past fluorescence imaging technologies have been
expensive, bulky and consume substantial power, confining the technique to
laboratories and hospital examination rooms.
Research associate, Dr Mohammed Al-Rawhani said: “We’ve confirmed in the lab
the ability of the system to image fluorescence ‘phantoms’ – mixtures of
flavins and haemoglobins which mimic closely how cancers are affected by
fluorescence in parts of the body like the intestines, the bowel and the
oesophagus.
“It’s a valuable new technique which could help clinicians make fewer false
positives and negatives in cancer diagnosis, which could lead to more effective
treatment in the future.”
Professor David Cumming, the University
of Glasgow’s chair of
Electronic Systems, said: “There’s still some way to go before it will be ready
for commercial production and clinical use, but we’re in early talks with
industry to bring a product to market. We’re also interested in expanding the
imaging capabilities of video-pill systems to new areas such as ultrasound in
the near future.”
- See more at: http://www.newelectronics.co.uk/electronics-news/semiconductor-imaging-technique-improves-cancer-detection/111826/#sthash.fz9XTlwo.dpuf
Amid a slowdown in the foundry and DRAM sectors, the outlook for the
semiconductor equipment industry looks somewhat cloudy, if not
challenging, in 2016.
In fact, for equipment vendors, 2016 could resemble the lackluster
year in 2015. In 2015, for example, capital spending in the foundry
sector fell during the year, although NAND flash began to pick up steam.
In 2015, though, the big story was fairly apparent. In April, Applied Materials’ proposed acquisition of Tokyo Electron Ltd. was scrapped due to regulatory issues. Then, in October, Lam Research grabbed the headlines by entering into a definitive agreement to acquire KLA-Tencor for $10.6 billion.
Going forward, 2016 could be another big year on the acquisition
front. But it could also be a relatively sluggish year for the equipment
industry. “In general, our estimate is for wafer fab equipment spending
in 2016 to remain flat relative to 2015, with some potential upsides,”
said Arthur Sherman, vice president of marketing and business
development at Applied Materials.
One area of concern is the foundry segment. Equipment vendors are
banking on new tool orders from foundries for the 10nm node in 2016, but
the ramp could take longer than expected. “We believe concerns over
customer demand at 16nm/14nm and inventory will lead to a slower ramp of
10nm,” said Patrick Ho, an analyst with Stifel, Nicolaus & Co. “We
believe 10nm projects have pushed out somewhat into 2017.”
In addition, capital spending for memory is a mixed bag. Advanced
packaging is a bright spot. And the used/mature equipment segment
continues to pick up steam. “Demand for power management, RF, MEMS, CIS
and sensors will continue to grow in 2016,” said Joanne Itow, an analyst
with Semico Research. “This will drive the demand for more mature
technology capacity.”
To get a grasp on the trends for the equipment business in 2016,
Semiconductor Engineering has taken a look at several markets, such as
photomasks, foundry, memory, and used gear. The numbers and consolidation
To be sure, 2016 appears to be a mixed bag. David Jensen, vice president
of strategic marketing at GlobalFoundries, projects that the overall IC
market will decline by more than 1% in 2015, but the chip business
could rebound and grow by around 3% in 2016. In addition, the foundry
business will grow by 6% to 6.5% in 2015, with another 5% to 7% growth
projected for 2016, Jensen said. “Generally speaking, across the board,
there is a little bit more bullishness about 2016,” he said.
In 2015, the wafer fab equipment (WFE) market is projected to reach
between $31.5 billion to $32 billion, or flat to slightly down from
2014, according to Ho from Stifel, Nicolaus, who attributed the
lackluster figures on a reduction in foundry spending.
Citing another sluggish year for foundry spending, Ho recently cut
its overall WFE forecast in 2016, from $34 billion to $32 billion. “The
biggest variables heading into 2016 are foundry spending, which is on
the downside, and NAND flash spending, which is on the upside,” he said.
Besides a flat year for capital spending, Ho also sees more
consolidation in the equipment business. In reality, the shakeout in the
equipment market started in the 1980s. In those days, a multitude of
chipmakers had what was then considered advanced fabs.
Then, at 90nm, fab and tool costs soared. Fewer chipmakers could
afford to build advanced fabs. Many IDMs, or chipmakers with fabs,
ditched their plants and embraced the foundry model. And over time, a
select few, leading-edge chipmakers with deep pockets emerged. But even
those vendors face some challenges today. Chip scaling is becoming more
expensive and difficult at each node. On top of that, the node
transitions are slowing.
In any case, the dwindling base of IDMs translated into fewer
companies that could afford to buy leading-edge semiconductor gear.
This, in part, fueled the shakeout in the equipment industry.
More recently, there are other factors at play. Generally, the
smaller equipment vendors lack the resources to advance their product
roadmaps. And so, the larger tool vendors are gobbling up the smaller
firms to expand their portfolios.
All told, the fab tool shakeout is far from over. “There should be
more M&A in the group, particularly among the small cap companies,”
said Ho from Stifel, Nicolaus. “We have noted for a long period of time
that the process control marketplace needs to consolidate with many
small niche players, like Nanometrics, Nova Measuring Instruments and
Rudolph Technologies, all at similar revenue levels. We also believe
other niche players like Ultratech and Axcelis also need to find
potential partners that can better position their growth going forward.
“While there is always the sentiment of hoping for a larger player to
take one of these companies out, we believe the better interim story is
to partner with one another, and we mean where the synergies fit, to
create a larger scale company that can compete more effectively in
today’s market environment,” Ho said. Mask shop trends
To be sure, the IC equipment and materials sectors are tough businesses,
especially one critical part of the supply chain—photomasks. In total,
the photomask industry is expected to reach $3.4 billion in 2016, up from $3.3 billion in 2015, according to SEMI.
As before, photomask makers continue to migrate to the next nodes.
But mask production is becoming more complex and expensive at each stop.
In addition, mask complexity is also increasing.
For example, foundries are ramping up their 16nm/14nm processes, with
10nm just around the corner. “2016 will see a growing number of 10nm
design starts, which will bring a number of issues to the mask
industry,” said Aki Fujimura, chief executive of D2S.
“Tighter process windows, increasingly complex mask shapes, smaller
assist features and curvilinear mask features will drive new
requirements for mask making, inspection and repair.”
Fujimura also sees other mask-related developments in 2016. “For
example, increasingly complex masks will lead to the need for inverse
lithography technology (ILT). Mask write times will continue to
increase, and we’ll also see slower and more accurate resists,” he said.
For years, the biggest problem in the mask shop is write times, which
are increasing at each node. The problem? Single-beam e-beam tools are
unable to keep pace with complex masks.
The solution: multi-beam e-beam mask writers. In fact, the IMS-JEOL
duo and NuFlare could separately ship the industry’s first multi-beam
mask writers in 2016.
In addition, the photomask industry could see the long-awaited
insertion of ILT. ILT introduces new sub-resolution auxiliary features
on the mask, which boosts pattern fidelity.
“2016 looks to be a strong year for captive mask houses as they ramp
for 10nm. A significant number of masks are (also) moving to an inverse
lithography format,” said Takuji Tada, senior manager of corporate
strategy and marketing at KLA-Tencor. “The move to inverse lithography
masks has created a new demand for more stringent inspection and
metrology in the mask shop.” Foundry spending falls
On the fab side, equipment makers hope for a rebound in the logic and
foundry sectors in 2016. Led by Intel, the WFE market for logic is
projected to increase by 10% to 15% in 2016, according to Stifel,
Nicolaus. But on the downside, the WFE market for foundries is expected
to decline 5% to 10% in 2016, according to the firm.
“We believe foundry will experience modest growth next year,
primarily characterized by some 28nm investment, some trailing edge,
some capacity additions for 14nm and 16nm, and the beginning of 10nm
investment,” said Satya Kumar, vice president of corporate marketing at
Lam Research. “We believe our customers are on track to ramp 10nm
investments in the second half of 2016.”
Others agree. “Calendar year 2015 saw the lowest foundry spending
levels in the past four years,” Applied’s Sherman said. “We anticipate
investment levels will be slightly higher for 2016, with most of the
spending happening in the second half of the year. More than 50% of this
investment will be focused on ramping 10nm technology. For foundries,
10nm differs from the 16nm node, as significant changes are being made
with respect to the finFET and interconnect to improve device performance and power consumption.”
There are other bright spots. Chipmakers will extend 193nm immersion
and multi-patterning to 10nm. This will fuel the growth for deposition
and etch.
Process control also could see a boost in 2016. “The increased need
for process control is driven by higher process complexity of
multi-patterning and vertical structures used in logic and memory,”
KLA-Tencor’s Tada said.
Meanwhile, behind the scenes, foundries are also developing 7nm. At
7nm, vendors hope to insert extreme ultraviolet (EUV) lithography. This,
of course, depends on the status of the power source, resists and EUV
mask infrastructure. “While EUV will not be arriving in 2016, the
industry has a lot of work ahead to make sure the infrastructure is
ready for it when it does arrive,” D2S’ Fujimura said. Memory Lane
Like the foundry/logic sectors, it’s a mixed bag for memory. “Overall,
we support the opinion of flat to slightly down WFE in 2016,” Lam’s
Kumar said. “Taking a look at the segments, we expect the memory market
to be down, which is mostly a result of DRAM. However, within DRAM, we
expect to see 20nm conversion spending and some initial 1xnm spending.
We think that the weaker overall DRAM will be offset by growth in NAND,
primarily relating to 3D NAND.”
The WFE market for DRAM is projected to fall by 10% to 20% in 2016,
according to Stifel, Nicolaus. But thanks to strong SSD demand, the WFE
market for NAND is expected to grow by 10% to 20% in 2016, according to
the firm.
While planar NAND remains robust, 3D NAND continues to generate
steam. In total, the installed capacity of 3D NAND is projected to grow
from about 150,000 wafer starts per month in 2015, to 300,000 by the end
of 2016, according to Stifel, Nicolaus.
“We believe that 3D NAND has a long technology roadmap and we are
still in the early innings,” Lam’s Kumar said. “We expect about a
quarter of the industry capacity converted to 3D NAND by the end of
2016.” Used tool demand
Amazingly, the used/mature equipment market remains robust in select
businesses. “We have been experiencing strong demand growth for our
equipment for larger design rules to support automotive, industrial,
sensors, and various IoT applications,” KLA-Tencor’s Tada said.
For these applications, chipmakers use both 200mm and 300mm tools, many of which are used and/or refurbished.
In either case, buyers of used equipment will need to keep a close
eye on the market. “A few used equipment vendors stocked up on tools at
the end of 2014 and managed to have a very good year selling that stock
throughout 2015,” Semico’s Itow said. “Transactions are slow now. It
could be a seasonal slowdown.”
What about 2016? “Some vendors are already taking orders for next
year and used equipment vendors are stocking up as the ‘More than Moore’
IDMs continue to plan their expansions and transitions,” Itow said.
“There isn’t much 200mm equipment inventory just sitting around (today).
So it is slightly more difficult to get some tools. If the market picks
up in early 2016, things could get tight leading to slightly higher
prices. Used equipment vendors are still not seeing much activity in
300mm tools. That is because 300mm tools are being sold directly, such
as IDM to IDM, or IDM to a foundry.”
SEOUL, Dec. 15 (Yonhap) -- South Korean chipmakers garnered a
record-high share in the global market for dynamic random access memory
(DRAM) chips in the third quarter, data showed Tuesday, further widening
the gap with other global rivals.
Samsung Electronics Co. took
up 45.9 percent of the global DRAM market in the July-September period,
up 3.6 percentage points from a year earlier, the data compiled by
industry tracker IHS showed.
With Samsung's local rival SK
hynix Inc. also taking up 27.6 percent of the market in the third
quarter, the combined share held by the two South Korean firms came to
73.5 percent, up 5.2 percentage points from the previous year.
It marked the fifth consecutive quarter for the two South Korean firms
to expand their combined presence in the global market.
U.S.-based Mircon Technology Inc., on the other hand, posted the lowest
share since its acquisition of Japan's Elpida Memory in 2013. Micron
took up 19.8 percent of the DRAM market in the third quarter, down 4.2
percentage points from a year earlier.
Two Taiwanese players followed, with Nanya Technology Corp. holding 2.8 percent and Winbond Electronics Corp. 1.3 percent.
Apple paid $18.2 million to buy a small
chipmaking factory in San Jose that could help the company test new
chips to power its products, according to a report in the Silicon Valley Business Journal.
Apple purchased the 70,000-square foot
facility from chipmaker Maxim Integrated Products last week, the
Business Journal said, citing public records. The facility includes chip
manufacturing tools and is located near Samsung Semiconductor, one of
the main manufacturers for Apple's A9 processor, the chip at the heart
of the iPhone.
Apple currently designs the main
processor used in its iPhones, iPads and Apple Watch devices, while
Samsung and and TSMC manufacture the actual chips.
The real estate deal suggests that Apple
may want to take a more hands-on role creating its chips, but does not
necessarily mean the company will start manufacturing its own chips.
For one thing, the facility is small. As the marketing material for the property says, the facility is well suited for "prototype, pilot and low-volume manufacturing."
It's not unusual for chip companies to
operate special, small-scale "fabs" where new chip designs are tested
and tweaked, with volume production handled at significantly larger
facilities.
The equipment in the fab is also geared
for the analog and mixed-signal chips that Maxim develops, and is not
cutting-edge enough to produce Apple's A9 processors. The A9 processors
feature tiny transistors measuring 14 nanometers and 16 nanometers,
which is pretty much the most advanced technology available today. The
equipment at the Maxim facility, by contrast, is capable of building
chips with much less advanced transistors that measure anywhere from 600
nanometers to 90 nanometers.
Apple could upgrade the facility by
purchasing and installing more cutting-edge equipment. Or it's possible
that Apple wants to use the facility to test other types of chips
besides its line of processors
http://www.businessinsider.com/apple-buys-small-chip-fab-2015-12
Atmel Corp., which agreed in September to be acquired by Dialog
Semiconductor Plc, said it received an unsolicited bid of $9 a share in
cash that may top the Dialog deal.
The San Jose, California-based
chipmaker said it determined the new offer “would reasonably be expected
to result” in a deal superior to Dialog’s proposal under the merger
agreement. Dialog had agreed to pay $4.65 in cash and 0.112 of a Dialog
American depository receipt for each share of stock, making its offer
about $8.81 a share, based on current prices. As a result of the new
bid, Atmel’s directors will engage in buyout talks with the potential
acquirer, the company said in a statement Friday.
Dialog last
month received approvals from German and U.S. authorities for the Atmel
acquisition. Activist hedge fund Elliott Management Co. has been
fighting the deal, saying it would destroy Dialog’s shareholder value.
Dialog’s stock has declined 27 percent since the merger with Atmel was
announced Sept. 20.
Board Backs Dialog
Atmel’s
board said it was advising against the unsolicited new offer and there
was no assurance the bid would result in a deal. The directors continued
to recommend shareholders back the merger with Dialog, which remains in
effect. Atmel’s shares gained as much as 8.7 percent to $9.20 in
extended trading in New York after Friday’s announcement.
Dialog,
based in Reading, England, makes chips used in Apple Inc.’s iPhone and
iPad. It sought Atmel to reduce its reliance on mobile phones and gain
complementary products for the automotive industry and that power the
Internet of Things. The announced deal was part of a record year for
semiconductor acquisitions, as chipmakers seek to counter slowing growth
and increasing costs. The mergers also reflect the increasing
technology being used to connect homes, cars and appliances to the Web.
Atmel
said in August it was considering strategic options. Dialog Chief
Executive Officer Jalal Bagherli said the company had to compete with
other bidders to win Atmel.
Qatalyst Partners is acting as
financial adviser to Atmel, and Jones Day is acting as the company’s
external legal adviser, the company said.
Semiconductor Engineering sat down to discuss power, standards and the IoT with Jerry Frenkil, director of open standards at Si2; Frank Schirrmeister, group director of product marketing of the System Development Suite at Cadence; Randy Smith, vice president of marketing at Sonics; and Vojin Zivojnovic, co-founder and CEO of Aggios. What follows are excerpts of that discussion, which was held in front of a live audience at the IEEE SA Symposium on EDA and IP Interoperability in San Jose. To view part one, click here. SE: How much more power can we save in the future compared with what we’re doing today? Smith: More than half. Schirrmeister: Given that we are engineers, we
sometimes getting lost in optimizing the noise. One reason we go through
all this trouble is that we want to optimize the time you can go
between charges. I never watch a video on my game console because it’s
about 100 times more power inefficient than a dedicated device. From a
global power perspective, that’s really the noise. It’s still important.
You need to deal with the thermal effects. You need to use the right
protocol to connect the device. Which wireless interface and which
decoder to you use? That’s more important holistically. Frenkil: It’s hard to answer with a specific number,
but half sounds about right. There are a couple of examples that lead
me to believe we can do better. For a systems designer and a product
designer, what are you concerned about? If I’m designing an IoT device,
I’m not necessarily concerned about the power consumption in a data
center. I may divide my architecture into different points, depending
upon what I want to hit. If I want to do a really low-power node, I
might do two things. One is I might do minimal processing there. Maybe
I’m shipping symbols instead of data, so the data center can interpret
those symbols and do all the processing. The second thing is if I’m
doing minimal processing on the node, maybe I can go to a really low
voltage. Today, practically speaking, not many designs are done using
near-threshold voltages. It’s too hard and the performance drops off
rather rapidly. If I combine judicious partitioning of my system, which
allows me to do minimal local processing so I can use a much
lower-voltage design, then I can go a lot lower. Schirrmeister: I charge my phone every day. But if
you look at the power envelope of this phone versus the previous
generations, it seems to run for 1 day or 1.5 days. But it does so much
more now than what it did five or six years ago. The question isn’t
power or energy itself. It’s the workload for a given amount of power,
and there we have improved much more than half. The power envelope is
only going slightly down, but the amount of stuff you can do with it is
much more. SE: If you get much more efficiency out of something designed
for a specific function, do IoT devices have to be very specific in
what they do? And how does that change the overall design? Schirrmeister: Absolutely that needs to happen. My
first phone didn’t have the dedicated hardware decoder for video. I was
always afraid when I went to the gym whether I would be able to get
through my favorite show. Now you only use 10% of the power because
they’ve made it a dedicated function that has been optimized for that
purpose. Zivojnovic: In mobile devices, just on the software
side you can squeeze out 40% more efficiency. On devices like set-top
boxes, TVs and game consoles, it’s easy to reach 80% just by tuning the
software. The key is something just built for a certain purpose. It only
has to do certain jobs. You can get orders of magnitude improvement
because some transistors don’t have to clock. What we’re doing with
clock gating and voltage gating is simply mimicking the logic. You can
look at every research book or introduction to digital design and you
will see there are synchronous clocks, synchronous logic and
asynchronous logic. So you can go from one day to 10 days between
charges. We are playing with what we call software-defined power
management. Smith: Sometimes we get caught up with what happens
in the applications process with some of the sophisticated techniques
we’re talking about. Our rather informal survey of customers says the
average is three or less power domains on chips because it’s just too
hard to design and verify if they put in a lot more than that. That’s
why we need all these models and standards to build the design, analysis
and verification tools. They’re not doing it now. They’re doing it on
chips where they have the volume for them, but the vast majority use
three or less domains. At the same time, we’re seeing designs with 120
or more blocks. There is a lot of opportunity to get more granular with
controlling power, but they’re too complex using today’s IP models and
tools. That’s our challenge to solve to really bring down the power. SE: One of the hidden taxes in the IoT is security. Security costs power and cycles somewhere. Is there a better way to do it? Zivojnovic: Security very often is an excuse for not
doing a good design. We have seen cases where people don’t want to put
the additional effort into a device like a set-top box. Then, when they
are forced by the manufacturer, or occasionally by the regulators, most
of them give up and add the mobile processor, more efficient memory or
green memory. But with security you need to be constantly in charge of
the unit. It’s very important. But there are better ways, such as having
hardware accelerators to engage with dedicated hardware. Smith: There is active security, and there is
designed-in security, which is passive. Active includes things like
encryption. It takes more power and you have to account for that. You
can design in better stuff like hardware firewalls and set up your
router so this block can never talk to that block. Your fingerprint can
never get a message out to your radio so you’ll never be able to
transmit your fingerprints someplace. That’s a simple thing you can do
in design. It does mean extra effort in design, though, because you’re
stopping things you don’t want to happen from ever happening. And then
those in a general-purpose system, you pay the cost for encryption or
security you have to enforce. There will be costs, but we can be smart
about it. Frenkil: On the encryption side, there will be some
more costs but it won’t be that high. We can have a standard for
encryption for the IoT. That can be built as a piece of hard IP. It will
be small and power-efficient. It will consume some power, but if it’s
hard IP it can be made quite power-efficient. And it’s something you can
put in almost as a no-brainer. But we do need standard protocols with
standard security in those protocols to enable people to define what is
that encryption, what does that security processor look like. Schirrmeister: It depends on the design. If the
requirements at the end dictate that security is more important than
power or the lifetime of the battery, then you have to do it. You don’t
want your health information transmitted or for someone to be able to
hack into it. It’s a question of what type of device you’re looking at.
DRAM maker Inotera Memories has announced the purchase of a
batch of production equipment from Micron Technology for around NT$411
million (US$12.58 million).
The equipment is for 12-inch wafer testing, Inotera said.
In
addition, Inotera reiterated plans to convert 80% of its total wafer
start capacity to 20nm process technology by the end of 2015, and its
entire capacity will be built using the newer node by the end of
second-quarter 2016.
Transitioning to 20nm process technology will help lower Inotera's manufacturing costs substantially in 2016, the company added.
Inotera's
bit shipments are forecast to grow by a single-digit percentage
sequentially in the fourth quarter of 2015 followed by a double-digit
increase in first-quarter 2016, the company said.
Inotera sells all of its manufacturing output to Micron.
Nov 18 ON Semiconductor Corp said it
would buy Fairchild Semiconductor International Inc in a
$2.4 billion deal, the latest in a rapidly consolidating
semiconductor industry.
The offer of $20 per share represents a premium of nearly 12
percent to Fairchild Semiconductor's Tuesday close.
(Reporting by Devika Krishna Kumar in Bengaluru; Editing by
Saumyadeb Chakrabarty)
For a while it was hard to get your hands on an ARM server, but that may not be the case soon.
Five computer makers have announced servers with ARM processors that
will challenge x86 systems in the mainstream market. The systems are
largely for Internet and cloud workloads and have the 48-core Cavium
ThunderX chip, which is based on 64-bit ARM architecture.
The servers from Gigabyte, Inventec, Wistron, Penguin Computing and E4 Computer Engineering are based on designs commonly used in x86 servers, but have ARM processors.
An interesting twist in some new servers is the ability to also use
Nvidia's Tesla graphics processors, adding extra processing punch for
graphics, engineering and other high-performance computing applications.
The systems largely have one or two sockets, and play to different
strengths. For example, Gigabyte's systems can be configured with up to
24 2.5-inch hard drives, making it particularly suitable for Web serving
or storage. Penguin Computing's upcoming 19-inch Valkre system -- which
will ship in 2016 -- is targeted at high-performance computing and can
be configured with SSDs and different I/O technologies. Wistron's
WV-S7224-10 and WV-A7424-10 are 2U and 4U storage servers, respectively.
All of the servers have shared power and cooling resources.
Pricing for the servers was not immediately available. The servers
were announced at the Supercomputing 15 conference in Austin, Texas,
this week.
Most of the companies announcing ARM servers can make and supply
servers to buyers directly, eliminating the middleman traditionally
involved in the selling process. Wistron and Inventec are also making
their mark as server vendors in China.
ARM develops and licenses its processor architecture and is best
known for its mobile chips. Some believe the power efficiency derived
from the mobile chips could translate to low-power ARM servers. But up
to now only a few systems have been available, with the most notable
being Hewlett Packard Enterprise's Moonshot.
The new servers could be the shot in the arm that ARM needs to make a
serious push for the server market. Chip makers are struggling to
generate profits with mobile and PC chips, since margins are thin for
those systems, so servers could be a lucrative alternative for vendors
using ARM-architecture chips. AMD plans to offer both x86- and
ARM-architecture chips as it rebuilds its server product line.
Samsung Electronics Co. gave its
biggest indication yet that the company’s upcoming high-end Galaxy
smartphones will use only one chip to run applications and enable
wireless connections.
The
world’s biggest maker of smartphones last week unveiled its latest
semiconductor, called the Exynos 8 Octa. It is designed to perform
functions that currently require two chips, and mass production is
scheduled to start this year.
“As
a component provider you have to find the biggest customer in the
world, and for us it happened to be Samsung,” Hong Kyushik, vice
president for marketing at Samsung’s System LSI business, said Monday
during an investor briefing in Singapore. “Exynos 8 is targeted for the
premium segment.”
He
declined to comment specifically on customers for the new chip.
Combining two chips into one helps make devices more energy-efficient,
and Samsung says the Exynos processor improves performance.
Samsung
is the world’s biggest memory-chip maker, yet it’s trying to build
scale in processing by developing Exynos as a direct challenger to
Qualcomm Inc.’s Snapdragon lineup, which dominates the mobile device
market. The company is coming to depend on components, investing in new
plants for chips and displays, as its Galaxy lineup struggles to compete
with Apple Inc.’s iPhones and cheaper devices in China and India.
“We strongly believe Samsung’s Exynos processors is to become one major pillar of growth
and one which should help its entire component business,” Amir
Anvarzadeh, a manager of Japanese equity sales at BGC Partners Inc. in
Singapore, said in a Nov. 12 e-mail. “Samsung is likely to dramatically
ramp output of these chips beyond its own needs and to begin supplying
other handset makers.”
From electronic records to digital medical devices, all signs point to healthcare as a stable, Read Now
The battery is based on the same lithium ion chemistry used in cellphone
batteries today but gets its advantage from atoms of graphite bonded to
the anode, Huawei said on Friday at an industry conference in Japan.
That change means faster charging but not at the expense of usage life
or a sacrifice in the amount of energy that can be stored in each
battery, it said.
It was developed by Huawei research and development subsidiary Watt Lab
and the company showed off two prototypes in videos posted online.
One of the two batteries has a capacity of 3,000mAh (milliampere hours)
-- about equivalent to the batteries in modern smartphones -- and can be charged to 48 percent of capacity in five minutes. The second has a much smaller capacity of 600mAh but reaches 68 percent of capacity in just two minutes.
The batteries have undergone repeated testing and the fast charging isn't a one-time deal, the company said.
In the video, a battery is taken from a Huawei smartphone and recharged
in a prototype charging unit. The device is bulky and hasn't been shrunk
to the size that it could fit inside a phone.
Huawei didn't say when the fast charging might make its way into commercial products.
The announcement is one of a number this year that all point toward
faster charging or longer battery life. Advances in battery technology
have lagged other areas of technology and battery life remains a
limiting factor for gadgets such as phones and larger products like
electric vehicles.
Earlier this week, researchers at Vanderbilt University said they had used quantum dots of iron pyrite, also know as fool's gold, to realize a fast-charging lithium ion battery.
Scientists at Stanford University presented in April
a fast-charging battery that uses aluminum-ion cells. They said it
could be charged in about a minute, but at that time had only realized
prototypes that were not powerful enough for use in smartphones.
Resistive RAM appears to be gaining traction. Once considered a
universal memory candidate—a replacement for DRAM, flash and SRAM—ReRAM
is carving out a niche between DRAM and storage-class memory. Now the
question is how large that niche ultimately becomes and whether other
competing technologies rush into that space. ReRAM
(known alternately as RRAM), is a type of non-volatile memory that
began garnering attention in 2009 when startup Unity Semiconductor
emerged from stealth mode. Rambus bought Unity in 2012 because it was
one of several contenders for the next generation of memory technology,
along with ferroelectric RAM (FeRAM) and Magnetoresistive RAM. ReRAM also has been considered a possible replacement for 2D NAND, NOR flash, and other memory types.
Since then, multiple competitors have entered into the ReRAM business, which seems to validate the potential here.
“I have worked in memory all my career, and for years it was looked
down upon as boring,” said Gary Bronner, vice president of Rambus Labs.
“Today it is leading innovation. It’s very exciting.”
He’s not alone in that view. “It’s a really exciting time to be in
the memory business,” said Sylvian Dubois, vice president of strategic
marketing at Crossbar.
What makes ReRAM so interesting is the limitation of other memory
choices. There is DRAM for rapid access memory; NAND flash, which is
three orders of magnitude slower; and there is storage-class memory in
between. Storage-class memory, a term first coined by IBM several years
ago, could have a huge impact on computation efficiency.
“I believe that the gap could be filled by two or three different
types of ReRam, and could see a real reduction in the volume of DRAM
being used,” Bronner said. “This would have very significant impact on
the industry. Architects have been very clever at taking advantage of
developments. They already take advantage of hierarchy of memory on chip
and chip to chip.”
There is a decent list of alternative memory types that all rely upon
a bi-stable material as the storage element that changes resistance. Rambus is working with a multilayer metal oxide structure that changes resistance by injecting ions into the material.
Crossbar uses silver atoms suspended in an amorphous silicon matrix.
Under write voltage, atoms from a top silver layer migrate into the
matrix to form bridges of conductive metal filaments. “These filaments
are only 3nm in diameter, but create a very large on/off ratio,” Dubois
said. The company has published results for a 7nm read cell.
The other option that has been widely publicized involves
phase-change materials, which depend on melting a material and then
cooling, quickly or slowly, to create either crystalline or amorphous
phases. In terms of these materials choices, Bronner observed that “the
physics of the phase change material is probably the best understood.”
However, thermal-based solutions have had a rocky history in the
semiconductor industry, from Heat Assisted Magnetic Recording (HAMR) to
smectic liquid crystal displays. The problem is that heat spreads, so
there is crosstalk between neighbors and DC heating of the part that
depends on duty cycle.
“Many people have favored other materials over phase change for these
reasons,” Bronner said. “However, Intel and Micron have pioneered work
in these materials, presumably because the device physics is much better
understood.”
In the end heat may limit the phase change device to lower bandwidths and higher power, according to Dubois.
In addition to material choices, there also are architectural
choices. Although crossbars have received a lot of publicity, a 1
transistor-1 storage cell similar to DRAM is where many are starting,
particularly for embedded memory. It makes integration much simpler and
gives the best access times.
“You can add the new material after the conventional device processing is completed,” Bronner said.
Crossbars give higher density and single bit access, but are limited
in the size of each block of crossbars. This is a similar problem to the
old multiplexed displays, where the cell count depends on the
non-linearity of the on-off switch.
The third choice is a 3D stack. One possibility is multilayers of
crossbars, but this requires lithography at each layer. More
interesting, in Bronner’s view, is “an equivalent to 3D NAND, where one
litho step creates a vertical string of storage cells. 3D NAND will
allow flash to continue to scale for five to seven years, and then new
materials will have an opportunity.”
The penalty for storage in the form of strings is that there is no
longer single-bit access, so the memory slows down. Different access
times and cost structure could result from single bit, byte, and
multi-byte architectures.
Dubois emphasized that crossbars and 3D all require a multiplexed 1
transistor to N cell architecture, which in turn means that each cell
must have a non-linear element. Some teams use a diode with each cell,
but Crossbar has demonstrated a cell that has its own non-linearity. Who and what will win?
“The most impressive progress was disclosed by the Intel/Micron
partnership over the summer when they described a 128Gbit chip 3D
XPoint” memory,” said Bronner. “To even think about building a device of
this size, requires a very mature level of process and defect control.” Intel
had a previous false start with phase-change memory. The company made
it clear that the technology has shifted, but has not elaborated on
that, according to industry sources.
A search of the U.S. Patent and Trade Office patent application
database found crossbar memory materials patents applications as
recently as 2012 assigned to Micron that focused on metal chalcogenide
phase change systems, which suggests that 3D XPoint may well be an
improved phase change system.
In its announcement Intel claimed “a crossbar structure which is
1,000 times faster than NAND flash and 10 times the density of DRAM.”
The company also showed a patterned wafer, discussed an operational
manufacturing plant in Utah, and said it plans to sell product next
year.
Panasonic currently sells a tantalum oxide-based ReRam embedded flash replacement for on-chip static memory.
Rambus purchased the ReRam IP of Unity Semiconductor in 2012 for$33M,
and has licensed that IPto a number of parties. Unity had raised more
than $22M and created 145 patents.
“Rambus is also partnering with licensees, such as Tezzaron, to
create embedded flash products,” Bronner said. “The focus of licensing
is architecture and materials.”
A patent search suggests those materials are metal oxides.
Elsewhere, in the startup world, Crossbar announced on Sept. 14 that
it has completed a $35 million Series D funding round, bringing the
total investment so far to $85 million. Crossbar plans to use the funds
to continue the commercial ramp of its “game-changing non-volatile (NVM)
memory technology.” At IEDM in 2014, the company reported a device
architecture that “has been successfully demonstrated in a 4 Mbit
integrated 3D stackable passive crossbar array.”
Dubois said Crossbar received wafers from one of its production
manufacturing partners. “The new funding will allow us to put products
with embedded RAM on the shelves and move Crossbar forward.”
It appears that differences between the various competitors are
primarily in their storage material choices that determine power, access
time, read/write cycles and cell size. This is a competition that
requires deep pockets, and smaller players are relying on being able to
use existing fabs to compete with the industry giants who can bankroll a
custom fab.
Two
of Europe’s biggest chipmakers are targeting futuristic cars that drive
themselves and have wireless connections as a new revenue growth
opportunity.
Infineon Technologies AG, which makes sensors
including those that enable autonomous driving, is predicting rising
car-chip sales even if total vehicle purchases decline, Chief Executive
Officer Reinhard Ploss said Wednesday in Barcelona. As cars become more
like robots -- more automated, and connecting to each other and to their
surroundings -- STMicroelectronics NV expects “very strong growth” in
demand, CEO Carlo Bozotti said at the same event.
"The number of
semiconductors in the car is growing and customers are willing to pay
extra for some features,” Ploss told investors at a conference hosted by
Morgan Stanley. “We are focused on everything that makes the car like a
driving robot.”
Carmakers
including BMW AG, Tesla Motors Inc. and Daimler AG are loading their
luxury models with technology. The average car had $333 worth of chip
content as of 2014, an increase of 11 percent in the past four years,
according to Bloomberg Intelligence. Hybrid and electric cars have
higher dollar content per car, as do higher-end models such as the
Mercedes S-Class compared with smaller budget models.
Infineon
rose 0.2 percent to 11.44 euros at 9:08 a.m. Thursday in Frankfurt.
STMicro declined 0.5 percent to 6.60 euros in Paris.
Infineon has
been building out its business focused on what’s known as
power-management chips, which are used to handle the flow of power in
electronics, from mobile phones to automobiles. Betting that demand for
these chips will keep rising, Infineon bought International Rectifier
Corp. for about $3 billion in cash in a deal completed in January. It’s
developing a radar sensor chip with Google that may go into car safety
applications.
Meanwhile at STMicro, Bozotti has turned to cars to
make up for falling sales in other segments like some smartphone parts.
He said his company has a 70 percent market share in products that help
vehicles detect their surroundings, process that information and behave
accordingly.
“Innovation is still thriving in semiconductors,” said Mark Muller, chief technology officer of ARM Holdings, in a keynote address Tuesday morning (November 10) at the ARM TechCon conference and exposition in Santa Clara, Calif.
“We’ve always had constraints on what we can do,” he added. Still, “there’s an incredible amount of innovation ahead of us.”
With ARM marking its 25th anniversary this month, Muller
briefly reviewed the history of the company and the technology that
preceded its establishment, harking back to the BBC Micro Model A/B computer of 1981 and the 1985 introduction of the ARM1 processor. The BBC Micro has ultimately led to this year’s introduction of the BBC micro:bit single-board computer, which is being provided for free to 10-year-old and 11-year-old schoolchildren in the United Kingdom.
Muller talked about ARM’s progress in getting its designs into server
chips, with “multiple manufacturers” shipping ARM-based servers, he
noted. Such servers are being implemented at the Barcelona Supercomputing Center in Spain and at Sandia National Laboratories, Muller said.
Moving on, Muller said, “Mobile computing has been transformed.”
While the annual growth rate of mobile devices is expected to decline to
10 percent by 2020, such “not bad” growth will primarily be coming from
entry-level smartphones by the end of the decade, he added.
The CTO touted “a truly remarkable product,” the Cortex-A35 processor,
being introduced at this week’s conference. Chips with that processor
design will be able to run on less than 6 milliwatts, he said.
At the same time, Muller said of ARM’s product strategy, “It’s so
much more than processors.” The company aspires to provide “all of the
IP [intellectual property] you need,” he said to the designers in
attendance.
Muller enthused about what he called “the product of the year,” an
energy-harvesting Bluetooth Low Energy insulin pen designed by Cambridge Consultants, incorporating a Dialog Semiconductor
chip. The KiCoPen concept has no battery, he noted. Using piezoelectric
technology, it derives its energy from the injector cap being removed
from the pen.
The ARM executive also addressed the security issue with the Internet
of Things and related products. “We’re under attack in a way we never
were before,” Muller said.
“How do we make a $1 microcontroller design done by people with no security experience?” he asked.
ARM also introduced the TrustZone CryptoCell security technology this week, along with its ARMv8-M architecture for embedded devices.
“The hardware is the easy part,” Muller commented. With the IoT,
there are familiar problems in chip and system design, “times trust,” he
said.
“You have to be able to secure them,” Muller said of IoT devices. “You share that trust around you.”
http://semimd.com/blog/2015/11/09/new-mems-sensors-emerge-at-mems-executive-congress-us/
By Jeff Dorsch, Contributing Editor
A wide variety of microelectromechanical system (MEMS) devices, sensors, and MEMS sensors were described and introduced at the MEMS Executive Congress US in Napa, Calif.
(Courtesy MEMS Industry Group MIG.)
The Bosch Group, the world’s leading supplier of MEMS sensors, highlighted several new products from its Bosch Sensortec and Akustica units, while Bosch eBike Systems demonstrated its electronic bicycle, which won the conference’s MEMS & Sensors Technology Showcase.
Marcellino Gemelli, Bosch Sensortec’s director of marketing and
business development, noted that Bosch Group has shipped more than 6
billion sensors. “The next 1 billion will be [in] less than a year,” he
said.
The company targets automotive, consumer, and Internet of Things
applications, Gemelli explained. Bosch has “one of the largest MEMS fabs
in the world” in Germany, he said, while outsourcing production of its
application-specific integrated circuits to foundries.
Smartphones are Bosch’s biggest market, with three out of four smartphones containing a Bosch sensor, Gemelli added.
Bosch Sensortec has introduced the BMF055 MEMS sensor, a programmable 9-axis motion sensor. The MEMS sensor is paired with an Atmel microcontroller.
The BMF055 “can run sensor fusion algorithms,” Gemelli said.
Akustica debuted the AKU151 and AKU350 ultra-high-performance MEMS
microphones. The microphone chips are aimed at mobile and wearable
applications. They both feature new ASIC design elements, a new MEMS
architecture and fabrication process, and new packaging technologies,
according to the company.
Bosch also brought out the SMA130 triaxial acceleration sensor for
automotive applications. “This accelerometer is based on the type of
accelerometer for the consumer space,” said Davin Yuknis, Akustica’s
vice president of sales and marketing. It targets non-safety
applications within the auto. “The technology comes from the same hands,
the same fab” as Bosch’s consumer-oriented MEMS sensors, he added.
Bosch is emphasizing the development of application-specific sensor
nodes, Gemelli said, describing them as “ASICs for the sensor world.”
ASSNs can work alongside stand-alone sensors and may be connected to
microcontrollers, application processors, and radio chips, according to
Gemelli.
Ian Chen of Freescale Semiconductor
had a big presence at the MEMS Executive Congress, making a
presentation in the conference program and being frequently found in the
press room, giving interviews.
“Sensors track changes in the physical environment,” said the senior
director of marketing for systems and applications in Freescale’s Sensor
Solutions Division. Applications include smart cooktops, smart beds
(for consumer and health-care applications), smart power tools, and
asset tracking and monitoring, he added.
In “breaking down cost barriers” for sensor adoption, Freescale is
offering evaluation kits for Internet of Things applications, Chen said.
These include the chip company’s Kinetis microcontrollers and sensors,
packaged on Arduino boards and integrated with multiple real-time
operating systems. Vesper CEO Matt Crowley was
touting his startup’s piezoelectric MEMS microphone technology at the
conference, demonstrating for analysts and journalists how the piezo
microphone can minimize ambient sounds, such as the conversation of
other people, in recording an interview.
Sensor technology on display on the show floor. (Courtesy MEMS Industry Group MIG)
Piezoelectric offers several advantages over capacitance microphones,
such as insensitivity to dust and being waterproof, according to
Crowley. “Piezo is very rugged,” he said. Apple is driving the growth in
advanced MEMS microphone technology, the Vesper CEO noted. “There are so
many acoustic applications,” Crowley said. The Amazon
Echo device has seven microphones, automotive vehicles may have a dozen
microphones, and there are smartphone prototypes with eight
microphones, he added. PNI Sensor was represented at
the MEMS and sensor conference by Becky Oh, president and CEO; George
Hsu, chairman, chief technology officer, and founder; and Deanna
McKenzie, sales and marketing manager. The company on November 4
introduced the SENtral-A2 ultra-low-power co-processor, a tiny chip
intended for smartphones and wearable gadgets.
The sensor fusion co-processor, which can also be used as a sensor
hub, includes an algorithm feature set and a context framework to enable
easier development of products with the chip.
The SENtral-A2 is “Google-compliant” with the Android mobile
operating system, Oh noted, while Hsu said the chip can deal with the
physical sensors and virtual sensors in Android-based products.
PNI Sensor was established in 1987 to develop sensors for the
American military. In shifting its focus to consumer applications, the
company found “there is a lot of interest in dead reckoning,” Oh said.
“We did get a lot of design wins in wearables and in Chinese
smartphones.”
Julian Ho, Taipei; Steve Shen, DIGITIMES [Friday 6 November 2015]
China's national semiconductor industry investment
fund has changed the rules of industrial competition, and backed by this
fund China-based companies will definitely ramp up the production of
its semiconductor products, according to Tien Wu, COO of Advanced
Semiconductor Engineering (ASE).
The fast developments
of a number of industries in China, including LCD panels, LED chips and
solar panels, have led to freefall in prices of related products because
China-based enterprises have been constantly ramping up capacity with
"easy money" from government.
Since 1990, the
production value of the global semiconductor industry has expanded by
six fold, and yet the ASP of semiconductor products still remains rather
stable. This means that demand and supply of the industry have been
kept in balance through economies of scale in production and innovative
activities which have helped increase the value-added of products.
The
global semiconductor industry will be able to grow by a CAGR of 5% in
the next 10 years if production scale and innovation are kept in
balance.
The mishaps of China's flat panel, LED and
solar panel industries were due mainly to the fact that the pace of
innovation of these industries has failed to keep up with the pace in
capacity ramps.
Fortunately, China seems to have
adopted a different approach to promoting the development of its
semiconductor industry as we have not yet seen frantic investments in
capacity ramps.
However, since the rules of competition
have been changed, Taiwan-based companies have to think to advance fast
in terms of innovation in order to avoid being caught up.
It
was originally estimated that it will take 10 years for China's
semiconductor industry to catch up with Taiwan's, but under the support
of the national investment fund the time will be shortened.
The
entry-level IC backend service market will be taken over by China-based
companies in the next 10 year. As a result, Taiwan-based IC testing and
packaging firms have to tie up with companies in more advanced
economies to develop products with more value-added.
Google is reportedly taking a page out of Apple's playbook and
expressing interest in co-developing Android chips based on its own
designs, according to a report today from The Information.
Similar to how the iPhone carries a Ax chip designed by Apple but
manufactured by companies like Samsung, Google wants to bring its own
expertise and consistency to the Android ecosystem. To do that, it would
need to convince a company like Qualcomm, which produces some of the
top Android smartphone chips today using its own technology, to
sacrifice some of its competitive edge. Google did not respond to a
request for comment.
The discussions around Google-designed chips, which The Information say occurred this fall, originated around the company's desire to build an "enterprise connectivity device" — possibly the Pixel C laptop-tablet hybrid unveiled in September —
that would rely wholly on in-house technology. Soon, Google was
discussing the possibility of designing its own smartphone chips as
well, the report states. One benefit of Google's strategy would be the
ability to bake in cutting edge features into future versions of
Android, like support for augmented and virtual reality, that would
require more closely integrated software and hardware. A Google-designed chip may find its way to Nexus phones first
However, finding a chip co-developer may prove difficult. Though
Google may find a willing partner from the pool of low-cost Android
manufacturers, that partner may not be able to produce the
highest-quality chips capable of powering high-end smartphones. The
high-end market, which Apple dominates, is where Android fragmentation
may be costing Google precious sales. One possibility, if chip makers
don't agree to use Google designs, is requiring manufacturers of
Google's Nexus line use only its own designs — all the way from the chip
to the body of the device.
Rollouts
of new smartphone models will stimulate demand for mobile DRAM memory
in the fourth quarter of 2015, with the chip prices falling at a slower
pace, according to DRAMeXchange.
With the peak season
for smartphone shipments arriving, Apple's iPhone 6s and a host of
latest flagship devices from other brand vendors have been made
available on the market. Around 345.9 million smartphones will be
shipped in the fourth quarter of 2015, rising 3.7% sequentially and
hitting the highest quarterly level for the year, DRAMeXchange
predicted.
"Expanded smartphone shipments will fuel
mobile DRAM demand and limit the decline of its average selling price to
within 5% during the fourth quarter," said Avril Wu, assistant VP at
DRAMeXchange, in a statement.
However, seasonal factors
will drag down smartphone demand in the first half of 2016. Mobile DRAM
prices will fall 6-8% sequentially in the first and second quarters of
the year, DRAMeXchange said.
Nevertheless, compared to
PC- and server-use DRAM prices, prices for mobile DRAM chips continue a
relatively stable trend, DRAMeXchange noted. The world's top-3 DRAM
suppliers remain focused on allocating more of their available
capacities to produce mobile DRAM.
In addition, the
global output of 8Gb LPDDR4 chips made will expand significantly in the
second half of 2016, as SK Hynix and Micron Technology will move their
respective 20/21nm process technology to mass production, DRAMeXchange
indicated. The anticipated surge in the supply could put downward
pressure on mobile DRAM prices.
SEOUL, Nov. 4 (Yonhap) -- South Korean chipmakers are expected to
expand their production of dynamic random access memory (DRAM) chips
despite falling market prices in a bid to cope with the rise of Chinese
rivals, industry sources said Wednesday.
The global contract
price for a DDR3 4GB module, the standard in setting the price of DRAMs,
came to US$16.7 in October, down 9.5 percent from $18.5 posted in
September, the data compiled by industry tracker DRAMeXchange showed.
DRAMeXchange, however, said South Korea-based Samsung Electronics Co.
and SK hynix Inc. are expected to expand DRAM production to curb the
rise of Chinese chipmakers.
Earlier this year, Tsinghua
Unigroup of China sought to purchase Micron Inc. but faced challenges
from U.S. policymakers, who feared a possible outflow of key
technologies.
The move made by the state-owned Chinese firm was
seen as Beijing's ambition to make the chip industry its new growth
engine, increasing the potential threats for existing players.
The industry tracker said Samsung is expected to commence the
18-nanometer production in 2016 and further widen its gap with other
rivals. Samsung currently focuses on 20-nanometer production. A smaller
number indicates improved productivity.
SK hynix is also set to begin a full-fledged production of 21-nanometer DRAMs next year, it added.
"Though increasing capacity will result in short-term price
fluctuations and even declining profits, this action is necessary to
retain market shares and raise the competitive barriers against
potential rivals," DRAMeXchange said.
Samsung and SK hynix
currently take up more than 70 percent of the global DRAM market, while
the U.S. company Micron Technology Inc. boasts around a 20 percent
share.
Taiwan and China should cooperate
in the semiconductor sector, Taiwan chip designer MediaTek Inc
said on Monday, in response to media reports that said
China's state-backed tech conglomerate Tsinghua Unigroup Ltd was
interested in the firm.
Taiwan's government heavily regulates investments related to
China and the island's semiconductor industry, which is a
mainstay for the economy and one of the world's largest.
China is trying to develop its own fledgling chip industry
and on Friday, Tsinghua Unigroup said it was buying a 25 percent
stake in Powertech Technology Inc for $600 million.
Taiwan's Commercial Times newspaper quoted Tsinghua
Unigroup's Chairman Zhao Weiguo as saying on Sunday his firm
would be willing to merge its units Spreadtrum and RDA
Microelectronics with MediaTek in order to overtake Qualcomm Inc
.
Asked about the media report, MediaTek said in a statement
that as long as government policies allowed, it was open to
"join hands and raise the status and competitiveness of the
Chinese and Taiwanese enterprises in the global chip industry".
Unigroup became a force to be reckoned with in the
semiconductor industry after it bought Chinese chipmakers RDA
Microelectronics and Spreadtrum in deals totalling $1.6 billion
last year.
In October, a person familiar with the matter told Reuters
that Tsinghua Unigroup had hired as its global executive vice
president a Taiwanese chip industry veteran who was instrumental
in building up Taiwan's memory chip sector.
PMC-Sierra Inc. said it’s committed to a takeover offer from Skyworks
Solutions Inc. even after Microsemi Corp. raised its competing bid for
the maker of semiconductors for network drives.
While Microsemi’s $11.88 a share proposal
is “nominally higher,” Skyworks’ bid provides more value certainty
because it’s all cash, PMC-Sierra said in a statement. Microsemi is
offering $9.04 in cash and 0.0771 of common stock per share while
Skyworks proposal is at $11.60 a share.
Surging
costs for design and manufacturing, along with a shrinking customer
base, has driven a surge in deals by semiconductor makers. More than $90
billion in chip industry deals are pending or have been completed this
year worldwide, according to data compiled by Bloomberg.
“At
this time PMC’s board is unable to conclude that Microsemi’s proposal
constitutes a superior proposal as required under PMC’s existing
Skyworks merger agreement,” it said in the statement.
PMC-Sierra
makes chips that control drives in network equipment, data-center
storage systems and mobile-phone networks. The company, which reported
sales declines in two of the past three years, had hired a financial
adviser to seek a sale of the company, people familiar with the matter
had said.
Skyworks, based in Woburn, Massachusetts, makes chips
used in aircraft, automotive and security systems, among others. The
company intends to fund the acquisition with cash on hand from the
combined companies and fully committed debt financing. Microsemi also
makes chips for the military, specializing in parts that can withstand
the rigors of environments that include things like radiation that would
fry normal semiconductor products.
The analog/mixed signal world is being shaken up by a mix of new
tools, an influx of younger engineers with new and broader approaches,
and an emphasis on changing methodologies to improve time to market.
Analog and digital engineers have never quite seen eye-to-eye. Analog
teams leverage techniques that have been around, in some cases, for
decades, while digital teams rely heavily on the latest technology
available. While they have co-existed in mixed-signal environments, they
have largely gone about their jobs independently.
That is changing as a new generation of engineers enter the market,
offering new approaches to design and creating disruptions within
semiconductors and tool providers alike.
“It’s the changing of the guard of the people who are designing
electronics,” said Darrell Teegarden, mechatronics project manager in
the SLE systemvision.com team at Mentor Graphics. He said there is a step-function changing happening now as a number of changes converge on design teams.
“Engineers graduating today are a different breed than when we
graduated,” Teegarden said. “What they expect, the way they work — all
of these things are very very different, and that’s changing a lot of
the dynamics both of the tool companies but also maybe more importantly
for semiconductor companies. They have to be system engineers. The
courses they are taking [in college] now are holistic. You don’t just
focus on transistor design. The senior projects they are doing are
entire systems of hardware and software and sensors and actuators. It’s
stuff that connects with the Internet. They want to make self-driving
cars as a senior project. Their ambitions are almost as ridiculous. They
plot these amazing things because they don’t know any better and they
have expectations to go with that. It’s that design perspective of whole
systems, and then it’s also the expectation of how the world works,
like stuff should be free. This is a challenge for companies. But that’s
part of the disruption, and with disruption comes opportunity.”
To understand where this is headed, and how it impacts analog modeling, it helps to look at where analog modeling is today.
“If you talk in the context of pure analog Verification,
analog modeling refers very often to Verilog-A, where engineers aimed
to create a model for an analog block that could describe the behavior
of this block and some of its non-linear effects,” said Helene
Thibieroz, senior staff marketing manager at Synopsys. “That was strictly for analog or RF — in the context of analog verification—and not meant for mixed signal.”
Some engineering teams have taken system-level approaches doing
co-simulation with Matlab to try to do some higher level of modeling,
she explained. “If you now extend the concept of analog modeling to
mixed-signal, where you have a need to create a behavioral model for
speed and accuracy, different standards were created. The first one was
Verilog-AMS, which is a language including a mix of constructs from
analog and digital. This approach was first primarily used by analog
designers aiming to extend their flow to mixed-signal.”
The problem is that, unlike digital tools and standards, analog has
never been scalable. Thibieroz explained, “As the Verilog-AMS model is
parsed by a mixed-signal simulator, the design code is split internally
into a digital portion to be handled by a digital event-driven
simulator, and an analog portion to be handled by an analog circuit
simulator. The result is typically performance speed-up with reasonable
accuracy. Verilog-AMS has, however, several limitations that have made
adoption of this language challenging, especially for modern SoCs: it is
hard to scale as you need both expertise and model calibration, you
need people’s expertise to create those models (someone understanding
both analog and digital languages as well as the block behavior they are
trying to model) and you need to calibrate those models versus their
SPICE counterparts for each process or technology change.”
Real Number Modeling provided the second generation of behavioral
modeling where digital simulators model the analog behavior in the
digital domain using discretely simulated real values. The end result is
a considerable speed-up, but lower accuracy. “For example,” she said,
“Real Number Modeling does not accurately represent models having
significant feedback loops. As a result, this approach has been adopted
for functional verification only but not for modeling high-precision
analog blocks. Real Number Modeling also has some existing languages
limitations, mostly the lack of support for user-defined types that can
hold one or more real and user-defined resolution functions, and no true
relationship between current and voltage. So to remove those
limitations, a new modeling approach, System Verilog nettype was
created: it provides the required enhancements for modern mixed-signal
SoC verification (for example user-defined types that can hold one or
more real values) so provides the same performance gain with more
accuracy. However for all of those models, there is still a crucial need
to validate those models versus their SPICE counterparts.”
For this reason, it often becomes challenging for digital
verification teams to just rely on those analog models while doing
verification. Interactions between analog and digital have become more
and more complex and a behavioral model may not be able to fully
represent the true interaction of the analog block with the rest of the
design at the SoC level.
Depending of the design application and the need for accuracy, Real
Number Models may be able to be relied on, or certain blocks may need to
be included as SPICE blocks, Thibieroz pointed out. She pointed to
certain users that employ only real number models for their analog
blocks as the complexity of their analog block is minimal and their
transfer functions fairly linear. “For critical blocks that need SPICE
accuracy or relate to power management, other users choose not to use
analog models but simulate directly with the SPICE analog blocks to get
the true behavior of the circuit and therefore fully capture any
interaction between analog and digital.”
Those analog blocks are then integrated in the digital verification
methodology using technology that allows the designer to extend digital
concepts such as assertions and checkers to analog — resulting in a true
mixed-signal verification where both digital and analog are being
verified simultaneously. In this vein, Qualcomm will present a flow they
developed using VCS AMS at the AMS SIG event in Austin next week. The value of languages
Still, Teegarden has a high level of confidence in modeling languages.
“Today, you have ubiquitous kinds of SPICE variants that have all of the
advancements in technologies that were available in the early ’70s, and
amazingly there is still a lot you can do with SPICE. But we are way
past that limitation and the requirements are much greater than that
now. The modeling languages are a big help for that. These languages
have been around for a while and they are just finally delivering.”
But it also requires a lot of effort to use them effectively. “If you
see what people actually do right now, on the IC design side people who
do IC design, it’s not that VHDL-AMS or Verilog-AMS have really run out
of steam,” he said. “It’s that the natural inclination is to say, ‘If
I’m going to model a combination of SPICE level and HDL and RT level –
people just don’t use those languages in between because that’s a lot of
work. It’s not because the languages are not up to it that they don’t
do that work. It’s because it’s a lot of work. You’d rather just throw
hardware and time and model the transistor level in SPICE, model the
digital stuff at the RT level, and then mash it together. So the
languages have been there. They just haven’t been used because of those
issues.”
On the developer side, people that are trying to make use of the
stuff — that’s where the sweet spot is for these languages, Teegarden
suggested. “For one, the IC guys don’t want to put the transistor-level
IP out in a model on the Internet. That’s not a good idea. And even if
you did, it’s too slow. It’s not an impedance match for the things you
need to solve, and that’s where the hardware description languages are
at their best. It’s really the business model that isn’t working — the
technology is fine.”
To be sure, this is a complicated task. From the very outset of the
design, the engineering team has to know who is going to do what, and
what parts need modeling, and in what way.
“It’s an issue of the investment because traditionally people try to run a lot of simulation and directed tests but they don’t have a good measure of the Coverage,” said Mladen Nizic, engineering director, mixed-signal solutions at Cadence.
“And they don’t have the feedback loop saying, ‘I need a test that
would increase my coverage, which manages my risks.’ In other words, if
I’m writing another test, I really don’t know whether I’m adding much
into my verification overall. That’s where coverage and metric-driven
methodology is important.”
How does that apply to analog? “Four or five years ago, when you
mentioned to an analog guy coverage and metrics, they’d look at you and
roll their eyes and say, ‘What’s that?’ Today, if you read industry and
conference papers from users, you see a lot of engineering teams using
assertions in analog, and behavioral models at the transistor level in
the context of overall mixed-signal verification, and collecting
coverage and doing verification planning and test development to improve
and increase coverage. That’s really a good step,” he said. The problem with models
But one traditional obstacle in applying this methodology is that the
models are needed. “Especially in analog, where a lot of designs are
still done bottom up, it’s easy to plug in my transistor-level
description for analog blocks,” Nizic explained. “But that slows down
simulation so much that trying to functionally verify a complex chip
with all these different power modes and operating modes is not really
practical. So I need to write a model. Now, who writes the model? Who is
responsible to write the model? How easy is it to write the model? How
should I write the model so it’s reusable? And then, how do I make sure
the model is kept up to date with any changes in the spec, if it is
top-down or bottom-up? We see a lot of users initially hesitant, but as
they realize the benefits of a metric-driven approach, usually there is a
champion that learns the languages, learns how to code the models,
learns how to set up model verification, and then it proliferates.
Often, design and verification teams either have a very specialized
modeling team that works with the rest of the designers to come up with
these models, or sometimes designers themselves create some of the
models.”
Thibieroz agreed. “Traditionally, you will see an analog and digital
verification team but not someone being a mixed-signal verification
manager, i.e. the person that is going to be the link between analog
and digital and has understanding of both domains. The analog team would
create analog models to represent the various SPICE blocks and
characterize those using a classic analog verification. The digital team
will adopt the analog models to include them in the top level
simulation with very little knowledge on how those blocks were created
or calibrated. The problem with that is that there is very often a
disconnect, as those analog models are going to be used by the digital
team in a context of a digital verification, which is not correlated
with analog verification. So the test conditions at the top level are
different than those at the block level. The model itself may not
include all possible interactions between analog and digital occurring
at the top level. As such, you are starting to see more and more
collaboration between analog and digital teams as there is a growing
concern about accuracy and calibration of the models they are using.”
Tool vendors have been working to understand these interactions and
provide solutions. Mentor Graphics has its systemvision.com, which has
analog/mixed signal sensors and actuators to leverage VHDL AMS. For
Synopsys, it’s VCS-AMS. And for Cadence, it’s Virtuoso AMS Designer.
Along with the new standards work currently underway, the
analog/mixed-signal design space is changing rapidly. Old is meeting new
across the digital-analog divide, whether they want to or not.
