The world’s largest chip company sees a novel path toward computers of immense power.
Sometimes the solution to a problem is staring you in the face all
along. Chip maker Intel is betting that will be true in the race to
build quantum computers—machines that should offer immense processing
power by exploiting the oddities of quantum mechanics.
Competitors
IBM, Microsoft, and Google are all developing quantum components that
are different from the ones crunching data in today’s computers. But
Intel is trying to adapt the workhorse of existing computers, the
silicon transistor, for the task.
Intel has a team of quantum
hardware engineers in Portland, Oregon, who collaborate with researchers
in the Netherlands, at TU Delft’s QuTech quantum research institute,
under a $50 million grant established last year. Earlier this month
Intel’s group reported that they can now layer the ultra-pure silicon
needed for a quantum computer onto the standard wafers used in chip
factories.
This strategy makes Intel an outlier among industry and
academic groups working on qubits, as the basic components needed for
quantum computers are known. Other companies can run code on prototype
chips with several qubits made from superconducting circuits (see “Google’s Quantum Dream Machine”). No one has yet advanced silicon qubits that far.
A
quantum computer would need to have thousands or millions of qubits to
be broadly useful, though. And Jim Clarke, who leads Intel’s project as
director of quantum hardware, argues that silicon qubits are more likely
to get to that point (although Intel is also doing some research on
superconducting qubits). One thing in silicon’s favor, he says: the
expertise and equipment used to make conventional chips with billions of
identical transistors should allow work on perfecting and scaling up
silicon qubits to progress quickly.
Intel’s silicon qubits
represent data in a quantum property called the “spin” of a single
electron trapped inside a modified version of the transistors in its
existing commercial chips. “The hope is that if we make the best
transistors, then with a few material and design changes we can make the
best qubits,” says Clarke.
Another reason to work on silicon
qubits is that they should be more reliable than the superconducting
equivalents. Still, all qubits are error prone because they work on data
using very weak quantum effects (see “Google Researchers Make Quantum Components More Reliable”).
The
new process that helps Intel experiment with silicon qubits on standard
chip wafers, developed with the materials companies Urenco and Air
Liquide, should help speed up its research, says Andrew Dzurak,
who works on silicon qubits at the University of New South Wales in
Australia. “To get to hundreds of thousands of qubits, we will need
incredible engineering reliability, and that is the hallmark of the
semiconductor industry,” he says.
Companies developing
superconducting qubits also make them using existing chip fabrication
methods. But the resulting devices are larger than transistors, and
there is no template for how to manufacture and package them up in large
numbers, says Dzurak.
Chad Rigetti, founder and CEO of Rigetti Computing, a startup working on superconducting qubits
similar to those Google and IBM are developing, agrees that this
presents a challenge. But he argues that his chosen technology’s head
start will afford ample time and resources to tackle the problem.
Google
and Rigetti have both said that in just a few years they could build a
quantum chip with tens or hundreds of qubits that dramatically
outperforms conventional computers on certain problems, even doing
useful work on problems in chemistry or machine learning.
https://www.technologyreview.com/s/603165/intel-bets-it-can-turn-everyday-silicon-into-quantum-computings-wonder-material/?utm_campaign=internal&utm_medium=homepage&utm_source=top-stories_1
Thursday, December 22, 2016
Wednesday, December 21, 2016
Memory Drives Chip Growth
SAN JOSE, Calif. – Sales of memory chips will increase 10% next year to a new record high of $85.3 billion, according to the latest report from IC Insights. Increases are forecast to continue with sales reaching nearly $110.0 billion in 2021.
Thanks to both rising prices and volume sales, the memory
sector is expected to lead overall semiconductor sales growth. The
average annual growth rate for the memory market is forecast to be 7.3%
from 2016-2021, about 2.4 points higher than the total IC market during
the period, the market watcher predicts.IC Insights forecasts memory unit sales to grow at a 5.6% compound rate. Average selling prices will increase in all but one year (2020) through the forecast at an average annual rate of 1.8%, it said.
A decline in PC sales, the biggest user of memory chips, caused excess inventory and price declines in late 2015, leading to a 3% decline to $78.0 billion for memory chips that year. The fall came despite supplier consolidation, the lack of new capacity and rising emerging markets which normally boost the memory sector.
Weak market conditions began to improve in the middle of this year, though the memory sector is still expected to decline 1% in 2016. Average selling prices fell 3% last year and another 10% this year. NAND flash is the only memory segment expected to show growth in 2016.
— Rick Merritt, Silicon Valley Bureau Chief, EE Times
http://www.eetimes.com/document.asp?doc_id=1331034
Friday, December 16, 2016
The Inotera model unlikely to be implemented in China, says Micron CEO
For Micron Technology, it is no longer meaningful to
implement the "Inotera Memories model" in China, according to Mark
Durcan, CEO for the US memory vendor.
The so-called
Inotera model sees Micron receive licensing fees and a portion of memory
production capacity from partners which lack sufficient technology but
are capable of scaling up output with huge capital.
Micron
already has enough DRAM production capacity and economies of scale, and
having another partner like the pre-acquisition Inotera is no longer
meaningful for the company, said Durcan. Micron's principle is to
protect the interests of shareholders and the team, while avoiding
destabilizing the industry supply-demand balance, Durcan continued.
In
fact, the joint venture deal betwen Micron and Nanya Technology was
quite successful. Inotera was allowed to expand its DRAM production
capacity with technology licensed from Micron and capital from Nanya,
and Micron and Nanya were both able to expand their respective output
and global market share.
Nevertheless, the current
circumstances are different as DRAM prices have become more stable, and
Micron's production base worldwide has expanded substantially, Durcan
said.
Micron recently completed acquiring Inotera,
formerly a Taiwan-based production partner of the US firm. Previously,
Micron took over Taiwan-based Rexchip Electronics as a result of its
acquisition of Japan's Elpida Memory. Taiwan now accounts for more than
60% of Micron's overall DRAM production capacity, which is mostly
Micron's leading-edge capacity, Durcan said.
At the
same time, China is aggressively developing its homegrown chipmaking
industry including the memory sector. State-backed Tsinghua Unigroup had
previously proposed a more than US$20 billion bid for Micron, but the
offer is believed to have been turned down. Nevertheless, China remains
aggressive in building its homegrown technology for making DRAM chips.
China
will definitely be capable of finding a partner like Micron to license
technology and make joint investments with, but for Micron, it would be
appropriate to implement such a model 10 years ago when the DRAM
industry was still immature and very competitive, Durcan noted. The
industry has now entered its mature stage, and the chip prices tend to
grow at a relatively stable rate. For Micron, there is less reason to be
in that kind of relationship than there was 10 years ago, Durcan added.
However,
such a joint-venture model may make more sense in the NAND flash
sector, where the chip prices remain volatile and suppliers require huge
capital to expand their production capacity, Durcan indicated. In
China, nevertheless, implementing the model could be complex since every
group of investors has their own interests and values that have to be
materialized, Durcan said.
In addition, Durcan
commented that 2017 will be a "pretty good" year for the DRAM market as
supply seems to be well-controlled and demand is strong. As for NAND
flash, end-market demand is growing fast while suppliers are
transitioning to 3D technologies. The NAND flash market for 2017 is more
difficult to predict, Durcan said, but he believes the supply will
still be tight at least for the first half of 2017.
The
overall memory market outlook for the next 18 months is quite positive,
said Durcan, adding that suppliers are more cautious about their
investments and capacity expansions. At least spending from Micron's
competitors tends to be more reasonable, Durcan said.
In
other news, Micron on December 12 celebrated the completion of its
share swap agreement with Inotera. Leaders from both companies joined
Taiwan President Tsai Ing-wen for a closing ceremony at Inotera's
headquarters in Taoyuan. Durcan remarked at the ceremony that the
company will continue to expand its investment in Taiwan with plans to
establish a backend facility in Taichung for the manufacture of 3D DRAM
products, and to add more than 1,000 jobs at its local sites over a
number of years.
http://www.digitimes.com/news/a20161214PD200.html
Thursday, December 15, 2016
Cooperation for Global Competition LG and Samsung Groups’ Interdependence Likely to be Rising
Samsung
Group and LG Group are working more and more closely with each other in
the IT and consumer electronics industries. For example, Samsung
Electronics is discussing the supply of smartphone batteries with LG
Chem after the discontinuation of the Galaxy Note 7 attributable to
battery explosion. LG Electronics smartphones such as the G5 are
adopting DRAM and NAND flash chips manufactured by Samsung Electronics,
too. LG Innotek recently began to supply 2 metal chip-on films, a
smartphone component, to Samsung Electronics.
Industry insiders are regarding their cooperation as an essential element for the growth of those sectors. Until 2010 or so, both groups were running the same businesses, such as TV, mobile phone, consumer electronics and display, except for semiconductor. Their business strategies began to show some difference with the advent of smartphones and now they have reached a point where they are required to be complementary to each other.
These days, the LG Group is focusing on automotive electronics and expanding the business via LG Electronics, LG Chem and LG Innotek. LG Display is planning to manufacture automotive OLED panels from late next year as well. The Samsung Group is showing few noticeable movements in this industry.
They are moving in different directions in the TV market, too. LG is increasing its large OLED panel manufacturing facilities whereas Samsung is concentrating on quantum dot display. “Each of the two will have to procure components and materials it does not produce with the help of the other more and more frequently down the road,” said an industry source.
http://www.businesskorea.co.kr/english/news/ict/16765-cooperation-global-competition-lg-and-samsung-groups%E2%80%99-interdependence-likely-be
Industry insiders are regarding their cooperation as an essential element for the growth of those sectors. Until 2010 or so, both groups were running the same businesses, such as TV, mobile phone, consumer electronics and display, except for semiconductor. Their business strategies began to show some difference with the advent of smartphones and now they have reached a point where they are required to be complementary to each other.
These days, the LG Group is focusing on automotive electronics and expanding the business via LG Electronics, LG Chem and LG Innotek. LG Display is planning to manufacture automotive OLED panels from late next year as well. The Samsung Group is showing few noticeable movements in this industry.
They are moving in different directions in the TV market, too. LG is increasing its large OLED panel manufacturing facilities whereas Samsung is concentrating on quantum dot display. “Each of the two will have to procure components and materials it does not produce with the help of the other more and more frequently down the road,” said an industry source.
http://www.businesskorea.co.kr/english/news/ict/16765-cooperation-global-competition-lg-and-samsung-groups%E2%80%99-interdependence-likely-be
Wednesday, December 14, 2016
Seagate, SK Hynix said to team up for enterprise SSDs
Seagate and SK Hynix will form a joint venture dedicated
to developing SSDs for enterprise servers and data centers, according to
industry sources.
The joint venture will combine
Seagate's expertise in hard disk drives with SK Hynix' complete embedded
flash and SSD solutions to create a new player in the enterprise SSD
market, which is currently dominated by Samsung and Intel, said the
sources.
Western Digital earlier in 2016 completed its
acquisition of SanDisk making the pair the first camp consolidating
their respective areas of expertise, Western Digital's in HDD and
SanDisk in SSD, the sources noted. Seagate and SK Hynix are expected to
follow suit by forming a joint venture.
SK Hynix
previously acquired California-based Link_A_Media Devices (LAMD), a
developer of memory-chip controllers, which has already improved its
competitiveness in the SSD field by releasing products equipped with its
in-house developed controller chips, the sources identified. SK Hynix
plans to have its controller design team consolidated into the new
company, while Seagate will transfer part of its technical team to the
entity, the sources said.
In other news, Silicon Motion
Technology has entered the supply chain of the Alibaba Group by
providing the e-commerce company SSD solutions, the sources noted.
Silicon Motion previously acquired Shannon Systems, a China-based
supplier of enterprise-class PCIe SSD and storage array solutions, which
is helping the memory controller device supplier expand its presence in
China, the sources said.
http://www.digitimes.com/news/a20161213PD206.html
Tuesday, December 13, 2016
Lattice gives iCE40 more power, I/O and memory
The new devices, dubbed UltraPlus, have more memory (1.1 Mbit RAM), twice
the digital signal processors (8x DSPs), and improved I/Os over
previous generations.
Typically they are used for application specific processing offload in battery-powered systems. These applications include: voice recognition, gesture recognition, image recognition, haptic and graphics acceleration.
According to Lattice: “More DSPs offer the ability to compute higher- quality algorithms, while increased memory allows data to be buffered for longer low-power states. The flexible I/Os enable a more distributed heterogeneous processing architecture.”
Product features include:
http://www.electronicsweekly.com/news/lattice-gives-ice40-power-io-memory-2016-12/
Typically they are used for application specific processing offload in battery-powered systems. These applications include: voice recognition, gesture recognition, image recognition, haptic and graphics acceleration.
According to Lattice: “More DSPs offer the ability to compute higher- quality algorithms, while increased memory allows data to be buffered for longer low-power states. The flexible I/Os enable a more distributed heterogeneous processing architecture.”
Product features include:
- 1.1 Mbit SRAM, 8 DSP blocks, up to 5K LUTs and non-volatile configuration
- MIPI-I3C support for low-resolution, always-on camera applications
- Sub 100uW standby power consumption
- Package size as small as 2.15 x 2.55mm
“The iCE40 UltraPlus FPGAs expand its market reach to system designers who require FPGA functionality with improved DSP compute power, more I/Os and increased memory for buffering,” said C.H. Chee, senior director of marketing, mobile & consumer division at Lattice Semiconductor.The iCE40 UltraPlus product evaluation samples and boards are available immediately. More details can be found at www.latticesemi.com/iCE40UltraFamily.
http://www.electronicsweekly.com/news/lattice-gives-ice40-power-io-memory-2016-12/
Monday, December 12, 2016
Graphene transistors could make electronic bioprobes
Researchers at Harvard University in the US have made novel biosensors
from graphene transistors that work in high-ionic-strength solutions
typical of biological systems. The devices could be used to analyse
blood and body fluids in real time, and analyse proteins, nucleic acids
and other molecules without the need for target fluorescent labelling.
They might even be exploited in implantable electronic probes such as
those that detect critical neurotransmitter signals within the brain.
Nanoscale field-effect transistor (FET) sensors could be ideal for label-free real-time detection of biomolecules, but they also have, what many researchers thought, an insurmountable limitation, explains team leader Charles Lieber. “This was that they could not be used in physiological conditions because the high ionic strength would produce a short Debye length, thus screening the charge that we wish to detect. Previous work (including that by our group) tried to overcome this problem by reducing the ionic strength of the solutions used, but this means that we can cannot detect biological molecules in their real environment.”
Lieber and colleagues have now found a way around this problem by extending a concept they recently reported for nanowire FET devices in which graphene FET sensors are modified with a biomolecule-permeable polymer layer made from polyethylene glycol (or PEG) and spacer molecules, or PEG and analyte-specific DNA-aptamer receptors. “The polymer layer increases the effective Debye screening length near the FET surface and thus allows us to directly detect molecules in high-ionic-strength solutions in real time,” says Lieber.
“Another important result is that when we co-modified graphene devices with PEG and aptamers yielding specific binding and detection of PSA at physiological pH, these devices showed high selectivity against other proteins,” he adds. “We also demonstrated that the PEG/aptamer-modified biosensor can be regenerated so that it can be applied as a multi-use selective biosensor under physiological conditions.”
“To detect biomolecules in physiological solutions, we selectively modified the graphene device surfaces by adsorbing pyrene butyric acid (PYCOOH) onto them,” explains Lieber. “Then, the functional carboxyl groups (COOH) were coupled to PEG and spacer molecules or PEG and aptamer receptors using 1-ethyl-3-(3-dimethylaminopropyl)carbodiimide hydrochloride (EDC) and N-hydroxysulfosuccinimide (Sulpho-NHS). The modified device chips were finally mated to a polydimethylsiloxane (PDMS) microfluidic channel on the device region for the sensing measurements.”
According to the team, reporting its work in PNAS doi: 10.1073/pnas.1625010114, there are many “exciting” applications for the devices, including truly unique clinical and point-of-care sensors that can analyse blood and body fluids directly without having to adjust the high ionic strength of these fluids. “New applications for fundamental biological studies where we can analyse proteins, nucleic acids and other species in real time without the need to fluorescently label the targets both outside and inside cells are possible,” says Lieber. “We could even apply this unique physiologically compatible non-destructive detection capability to make implantable electronics probes – such as our recently reported syringe-injectable electronics, where it could be possible not only to detect electric signals but also ones from critical neurotransmitters within the brain in real time.”
The researchers say they are now planning to incorporate their FET biosensors into free-standing nanoelectronics scaffolds to enable long-term monitoring in biological and electrical signals in engineered tissues. “We believe this could dramatically transform tissue implants in regenerative medicine,” adds Lieber.
http://nanotechweb.org/cws/article/tech/67240
Nanoscale field-effect transistor (FET) sensors could be ideal for label-free real-time detection of biomolecules, but they also have, what many researchers thought, an insurmountable limitation, explains team leader Charles Lieber. “This was that they could not be used in physiological conditions because the high ionic strength would produce a short Debye length, thus screening the charge that we wish to detect. Previous work (including that by our group) tried to overcome this problem by reducing the ionic strength of the solutions used, but this means that we can cannot detect biological molecules in their real environment.”
Lieber and colleagues have now found a way around this problem by extending a concept they recently reported for nanowire FET devices in which graphene FET sensors are modified with a biomolecule-permeable polymer layer made from polyethylene glycol (or PEG) and spacer molecules, or PEG and analyte-specific DNA-aptamer receptors. “The polymer layer increases the effective Debye screening length near the FET surface and thus allows us to directly detect molecules in high-ionic-strength solutions in real time,” says Lieber.
A multi-use selective biosensor
“We showed that PEG-coated graphene FETs in physiological concentrations (100 mM buffer solution) can reversibly detect a molecule known as prostate specific antigen (PSA) at concentrations from 1 to 1000 nM,” he tells nanotechweb.org. “In contrast, similar FETs without PEG functionalization can only detect PSA in buffer salt concentrations lower than 50 nM.”“Another important result is that when we co-modified graphene devices with PEG and aptamers yielding specific binding and detection of PSA at physiological pH, these devices showed high selectivity against other proteins,” he adds. “We also demonstrated that the PEG/aptamer-modified biosensor can be regenerated so that it can be applied as a multi-use selective biosensor under physiological conditions.”
Devices made using standard photolithography
The researchers made their graphene transistors using standard photolithography in several key steps. First, graphene grown by chemical vapour deposition was transferred onto a silicon device fabrication wafer. Next, the graphene FET channels were defined by photolithography and oxygen plasma etching. Finally, passivated metal source/drain contacts were fabricated through a second photolithography step.“To detect biomolecules in physiological solutions, we selectively modified the graphene device surfaces by adsorbing pyrene butyric acid (PYCOOH) onto them,” explains Lieber. “Then, the functional carboxyl groups (COOH) were coupled to PEG and spacer molecules or PEG and aptamer receptors using 1-ethyl-3-(3-dimethylaminopropyl)carbodiimide hydrochloride (EDC) and N-hydroxysulfosuccinimide (Sulpho-NHS). The modified device chips were finally mated to a polydimethylsiloxane (PDMS) microfluidic channel on the device region for the sensing measurements.”
According to the team, reporting its work in PNAS doi: 10.1073/pnas.1625010114, there are many “exciting” applications for the devices, including truly unique clinical and point-of-care sensors that can analyse blood and body fluids directly without having to adjust the high ionic strength of these fluids. “New applications for fundamental biological studies where we can analyse proteins, nucleic acids and other species in real time without the need to fluorescently label the targets both outside and inside cells are possible,” says Lieber. “We could even apply this unique physiologically compatible non-destructive detection capability to make implantable electronics probes – such as our recently reported syringe-injectable electronics, where it could be possible not only to detect electric signals but also ones from critical neurotransmitters within the brain in real time.”
The researchers say they are now planning to incorporate their FET biosensors into free-standing nanoelectronics scaffolds to enable long-term monitoring in biological and electrical signals in engineered tissues. “We believe this could dramatically transform tissue implants in regenerative medicine,” adds Lieber.
http://nanotechweb.org/cws/article/tech/67240
Friday, December 9, 2016
ARM Offers Support For TSMC 7nm Manufacturing
LONDON--ARM
Ltd. announced the availability for evaluation and licensing of its
Artisan physical IP platform for the 7nm 7FF FinFET process from TSMC,
as well as a design win at that level with Xilinx Inc.
The IP set does not include support for extreme ultraviolet (EUV) lithography, which is expected to be deployed later."The physical IP platform is available for tape outs in 1H17. We see some engineering samples in 2017," Ron Moore, vice president of marketing in the physical design group at ARM, told EE Times Europe. However, it is not clear that there is a performance, power or area benefit in selecting the 7FF process over the 10FF process.
The 10FF was a marked scaling over 16FF+ that could produce a 20 percent speed increase at the same power, or more than 40 percent power reduction at the same speed, according to past reports (see TSMC Symposium: 10nm is ready for design starts). But it came at the cost of the increased use of double patterning.
Moore explained: "Basically TSMC has two nodes that are distinctly different 16/14 and 10/7. For TSMC, 7nm is the next generation from 10nm. But there are additional challenges such as lay-out rules and the electrical properties of transistors."
You can expand that list to include process variation, routability, analysis for sign-off, timing variation and electromigration. And at 7nm without EUV there will be a requirement for triple patterning.
"We will have to redefine our cells to take account of EUV but 7FF is based on immersion lithography," said Moore.
Routability used to be about relieving the congestion of wiring. It still is but at 7nm it has to be done with special attention to voltage drop and electromigration and parasitics have made it difficult to design a power grid. ARM has a developed a power grid architect that includes knowledge of the logic libraries. ARM claims that as a result, a knowledgeable SoC designer can create a power grid that meets their needs within a matter of hours, versus the several days and iterations it may have taken previously.
However, all of the extra work does mean that an area reduction is not guaranteed.
"The transistors may be smaller, but that does not
necessarily mean smaller cells," said Moore. As has been seen in the
past scaling of the front-end-of-line (FEOL) does not produce an area
benefit if it is hobbled by an earlier generation of back-end-of-line
(BEOL). There are in effect multiple levels of optimization; transistor,
standard cells, IP blocks, cores."Area savings can be realized at the core level but it is not a trivial task. It is about optimization for the combination of performance, power consumption and area [PPA]." For example ARM has also had to invent a memory compiler that could utilize a cell-based layout – rather than a more simplistic grid – to minimize variation. Minimizing variation leads to less design margin and better memory PPAhttp://www.eetimes.com/document.asp?_mc=RSS%5FEET%5FEDT&doc_id=1330963&page_number=2
Thursday, December 8, 2016
Bluetooth Beams New Spec, Chips
SAN JOSE, Calif. — The Bluetooth Special Interest Group officially ratified its version 5,
which includes a modular set of optional extensions for throughput,
range, and other features. Chip makers, including Cypress and Nordic,
are already sampling parts supporting the specs that do not include mesh
networking, a piece delayed until mid-2017.
The specs define a new modulation scheme for throughput up
to 2 Mbits/second. A new forward error correction technique can
quadruple range to an estimated 120 meters, albeit at significantly
lower data rates.The specs also expand the data messages carried over Bluetooth beacons from about 30 bytes to about 256 bytes. As a result, beacons will be able to broadcast a URL rather than a unique identifier pointing to one, enabling greater ease of use.
Beacons are a much-talked-about but still nascent application, with about 8 million units shipping this year and a total of 565 million by 2012, according to ABI Research. They are used for retail advertising, automated museum docents, and even broadcasting a URL to a manual so that OEMs don’t have to print and ship one with a product.
A final mesh spec is the next big thing for Bluetooth, something individual vendors already support but won’t be formally ratified until about June. It will use a flooding approach that is simpler to implement than routing used on Zigbee and Thread.
The trade-off is that “all nodes receive information and pass it on, even when it is not relevant; this means devices spend more time awake and relaying information than is necessary, increasing the power consumption of the network,” said Andrew Zignani, an analyst at ABI.
Among its challenges, Bluetooth needs to get designed into more hubs and gateways to enable mesh and long-range links. The community also has an ongoing debate about support for IPv6 to end nodes, something that some see as critical for interoperability and that others say generates unnecessary power and memory requirements.
With Bluetooth 5 and eventually meshing, links can expand through a house or even a building without the need of device-to-device pairing.
“A Bluetooth light switch with a coin cell can last for years, and you can’t do that with Wi-Fi — there are a lot of apps that only need a small piece of data and low power and are only possible with Bluetooth,” said Mark Powell, executive director of the Bluetooth SIG.
Some 3.5 billion Bluetooth links are expected to ship this year, most of them in smartphones with the next largest group in wireless headphones and speakers. Apple’s decision to end support of headphone jacks in the iPhone is expected to drive wireless headsets to volumes greater than wired versions.
The smart home is Bluetooth's biggest growth area. Its share of the smart home market is expected to rise from 8% today to more than 26% by 2021, according to ABI Research. By contrast, 802.15.4 variants including ZigBee, Thread, and 6LoWPAN will rise from just under 17% of the market today to almost 30% by 2021.
The Nordic chip includes a power amp, boosting output power considerably to drive greater throughput and range. Nordic doubled flash to 1 Mbyte and quadrupled RAM to 256 Kbytes compared to its previous 55-nm part.
Similarly, Cypress is sampling a Bluetooth chip with a boosted power amp to extend range to 400 meters and data rates to 2 Mbits/s, albeit at the cost of higher power consumption. The CYW20719 complies with Bluetooth 4.2 and is “Bluetooth 5-ready.” Cypress also supports a Bluetooth mesh capability on its Bluetooth version 4.2 chips.
http://www.eetimes.com/document.asp?doc_id=1330948
Wednesday, December 7, 2016
Chipmakers announce 7nm technology
As silicon chips approach physical limits, it is becoming harder and
more costly to deliver each new generation of technology. Yet the
foundries that fabricate most of the world's chips seem to be announcing
new nodes at a faster pace as they compete to make the chips that power
the latest and greatest gadgets. This week, at an industry conference
known as IEDM, the foundries announced details of the first 7nm process technology.
TSMC (Taiwan Semiconductor Manufacturing Company), the world's largest contract chipmaker, announced a 7nm process with the latest version of its 3D FinFET transistors for making future processors for smartphones and other mobile devices. To demonstrate the technology, TSMC produced a fully-function 256Mb SRAM test chip with the smallest reported memory-cell size (0.027 square microns). TSMC said the 7nm process will deliver either a 40 percent boost in performance or a 65 percent reduction in power at the transistor level compared to the current 16nm FinFET process. It is also less than half the size at 0.43x transistor density.
That all sounds impressive, but it's worth pointing out that TSMC is not comparing it to 10nm--which is widely expected to be a short-lived node--so the gains here are for two process nodes (or perhaps three if rumors of an interim "12nm process" are accurate). Nevertheless, the fabrication of a fully-functional chip with good performance and reliability at "high yield" (around 50 percent for the SRAM but much lower for logic) is a notable achievement, and TSMC emphasized that it is focused on helping customers get their 7nm chips to market as quickly as possible.
The competing R&D alliance of GlobalFoundries, Samsung Electronics and IBM also announced a 7nm process technology, but it is taking a different approach. TSMC is using the current 193nm immersion lithography tools while the alliance's process relies on a new form of lithography, known as EUV or extreme ultra-violet, to pattern some critical layers. Since EUV won't be ready for volume production until 2018-2019, this process may take longer to get to market, but it could deliver better scaling and lower cost.
Indeed, the group said that its 7nm process delivered the tightest pitches ever reported for FinFET transistors. The key dimensions for the 7nm process all show true scaling over those of the 10nm process the alliance announced at VLSI Symposium in 2014. The dimensions are so small, it said, that without EUV some layers could easily require four masks, a process that not only significantly increases the cost but also results in more defects. The alliance also used high-mobility materials and novel strain techniques to improve the performance of the transistors, which it said will deliver 35 percent to 40 percent better performance.
TSMC plans to start 10nm volume production this quarter with 7nm slated for the end of 2017. Samsung has already started mass production at 10nm and the first mobile processors are likely to be announced early next year. GlobalFoundries is planning to skip 10nm altogether and go directly to 7nm. It will start "risk production" in early 2018, which means 7nm will be in volume production around one year later.
The rapid pace implies that the foundries have taken the lead in semiconductor process technology. Intel has delayed 10nm production and won't release the first processors, Cannonlake desktop chips, until late 2017. As a stopgap, Intel released a third family of 14nm processors known as Kaby Lake.
But node names are misleading since they no longer bear any relation to actual chip dimensions. It is taking longer for Intel to get to each node, but it continues to deliver true Moore's Law scaling while, in some cases, the foundries have rolled out nodes that deliver little to no physical shrink. The key dimensions for Intel's 14nm node (the distances between the fins, gates and smallest metal lines) are similar to those of the foundries' 10nm processes, and it is reasonable to assume that Intel's 10nm process will be comparable to competitors' 7nm technology.
http://www.zdnet.com/article/chipmakers-announce-7nm-technology/
TSMC (Taiwan Semiconductor Manufacturing Company), the world's largest contract chipmaker, announced a 7nm process with the latest version of its 3D FinFET transistors for making future processors for smartphones and other mobile devices. To demonstrate the technology, TSMC produced a fully-function 256Mb SRAM test chip with the smallest reported memory-cell size (0.027 square microns). TSMC said the 7nm process will deliver either a 40 percent boost in performance or a 65 percent reduction in power at the transistor level compared to the current 16nm FinFET process. It is also less than half the size at 0.43x transistor density.
That all sounds impressive, but it's worth pointing out that TSMC is not comparing it to 10nm--which is widely expected to be a short-lived node--so the gains here are for two process nodes (or perhaps three if rumors of an interim "12nm process" are accurate). Nevertheless, the fabrication of a fully-functional chip with good performance and reliability at "high yield" (around 50 percent for the SRAM but much lower for logic) is a notable achievement, and TSMC emphasized that it is focused on helping customers get their 7nm chips to market as quickly as possible.
The competing R&D alliance of GlobalFoundries, Samsung Electronics and IBM also announced a 7nm process technology, but it is taking a different approach. TSMC is using the current 193nm immersion lithography tools while the alliance's process relies on a new form of lithography, known as EUV or extreme ultra-violet, to pattern some critical layers. Since EUV won't be ready for volume production until 2018-2019, this process may take longer to get to market, but it could deliver better scaling and lower cost.
Indeed, the group said that its 7nm process delivered the tightest pitches ever reported for FinFET transistors. The key dimensions for the 7nm process all show true scaling over those of the 10nm process the alliance announced at VLSI Symposium in 2014. The dimensions are so small, it said, that without EUV some layers could easily require four masks, a process that not only significantly increases the cost but also results in more defects. The alliance also used high-mobility materials and novel strain techniques to improve the performance of the transistors, which it said will deliver 35 percent to 40 percent better performance.
TSMC plans to start 10nm volume production this quarter with 7nm slated for the end of 2017. Samsung has already started mass production at 10nm and the first mobile processors are likely to be announced early next year. GlobalFoundries is planning to skip 10nm altogether and go directly to 7nm. It will start "risk production" in early 2018, which means 7nm will be in volume production around one year later.
The rapid pace implies that the foundries have taken the lead in semiconductor process technology. Intel has delayed 10nm production and won't release the first processors, Cannonlake desktop chips, until late 2017. As a stopgap, Intel released a third family of 14nm processors known as Kaby Lake.
But node names are misleading since they no longer bear any relation to actual chip dimensions. It is taking longer for Intel to get to each node, but it continues to deliver true Moore's Law scaling while, in some cases, the foundries have rolled out nodes that deliver little to no physical shrink. The key dimensions for Intel's 14nm node (the distances between the fins, gates and smallest metal lines) are similar to those of the foundries' 10nm processes, and it is reasonable to assume that Intel's 10nm process will be comparable to competitors' 7nm technology.
http://www.zdnet.com/article/chipmakers-announce-7nm-technology/
Tuesday, December 6, 2016
Global semicon sales to grow at modest pace in 2017 and 2018
http://www.thestar.com.my/business/business-news/2016/12/06/global-semicon-sales-to-grow-at-modest-pace-in-2017-and-2018/
KUALA LUMPUR: Global semiconductor sales are expected to grow at a modest pace in all the regions in 2017 and 2018 after flat annual sales projected for this year, says the US-based Semiconductor Industry Association (SIA).
It said on Monday that a new World Semiconductor Trade Statistics (WSTS) forecast showed that global sales were expected to be US$335bil in 2016, down 0.1% from the 2015 sales.
Beyond 2016, the industry was expected to record a 3.3% growth globally for 2017 (US$346.1bil in total sales) and 2.3% growth for 2018 (US$354.0bil).
For October 2016, worldwide sales of semiconductors reached US$30.5bil, up 3.4% from the previous month’s total of US$29.5bil. The sales were 5.1% higher than October 2015’s US$29bil.
SIA president and CEO John Neuffer said the global semiconductor market
has rebounded in recent months, with October marking the largest
year-to-year sales increase since March 2015.
“Sales increased compared to last month across all regional markets and nearly every major semiconductor product category.
“Meanwhile, the latest industry forecast has been revised upward and now calls for flat annual sales in 2016 and small increases in 2017 and 2018. All told, the industry is well-positioned for a strong close to 2016,” he said.
In October, regionally, year-on-year sales increased in China (14%), Japan (7.2%), Asia Pacific/All Other (1.9%), and the Americas (0.1%), but decreased in Europe (-3%).
Compared with September, sales were up across all regional markets: the Americas (6.5%), China (3.2%), Japan (3.0%), Europe (2.2%), and Asia Pacific/All Other (2.0%).
The SIA also endorsed the WSTS Autumn 2016 global semiconductor sales forecast, which projects the industry’s worldwide sales will be US$335bil in 2016, a 0.1% decrease from the 2015 sales total.
WSTS projects a year-to-year increase in Japan (3.2%) and Asia Pacific (2.5%), with decreases expected in Europe (-4.9%) and the Americas (-6.5%).
Among major semiconductor product categories, WSTS forecasts growth in 2016 for sensors (22.6%), discretes (4.2%), analog (4.8%) and MOS micro ICs (2.3%), which include microprocessors and microcontrollers.
KUALA LUMPUR: Global semiconductor sales are expected to grow at a modest pace in all the regions in 2017 and 2018 after flat annual sales projected for this year, says the US-based Semiconductor Industry Association (SIA).
It said on Monday that a new World Semiconductor Trade Statistics (WSTS) forecast showed that global sales were expected to be US$335bil in 2016, down 0.1% from the 2015 sales.
Beyond 2016, the industry was expected to record a 3.3% growth globally for 2017 (US$346.1bil in total sales) and 2.3% growth for 2018 (US$354.0bil).
For October 2016, worldwide sales of semiconductors reached US$30.5bil, up 3.4% from the previous month’s total of US$29.5bil. The sales were 5.1% higher than October 2015’s US$29bil.
“Sales increased compared to last month across all regional markets and nearly every major semiconductor product category.
“Meanwhile, the latest industry forecast has been revised upward and now calls for flat annual sales in 2016 and small increases in 2017 and 2018. All told, the industry is well-positioned for a strong close to 2016,” he said.
In October, regionally, year-on-year sales increased in China (14%), Japan (7.2%), Asia Pacific/All Other (1.9%), and the Americas (0.1%), but decreased in Europe (-3%).
Compared with September, sales were up across all regional markets: the Americas (6.5%), China (3.2%), Japan (3.0%), Europe (2.2%), and Asia Pacific/All Other (2.0%).
The SIA also endorsed the WSTS Autumn 2016 global semiconductor sales forecast, which projects the industry’s worldwide sales will be US$335bil in 2016, a 0.1% decrease from the 2015 sales total.
WSTS projects a year-to-year increase in Japan (3.2%) and Asia Pacific (2.5%), with decreases expected in Europe (-4.9%) and the Americas (-6.5%).
Among major semiconductor product categories, WSTS forecasts growth in 2016 for sensors (22.6%), discretes (4.2%), analog (4.8%) and MOS micro ICs (2.3%), which include microprocessors and microcontrollers.
Friday, December 2, 2016
Texas Instruments CFO March to Retire after 13 Years; Controller Lizardi Next CFO
Analog chip giant Texas Instruments (TXN) this afternoon said it will name corporate controller, Rafael Lizardi, as its new chief financial officer in February, replacing 32-year veteran Kevin March, who has been CFO for thirteen years, and is retiring at age 58.
March will stay on through October of next year to “oversee the transition duties.”
Shares of TI were down a penny in late trading at $70.40.
Lizardi, age 44, joined TI in 2001 after a career as a captain in the U.S. Army Corps of Engineers, the company said.
TI CEO Rich Templeton remarked on Lizardi’s “discipline” and “integrity,” saying that his “years in finance and controller positions for our manufacturing and our analog product lines have enabled him to develop in-depth knowledge of our semiconductor operations.”
He also thanked March, saying that “customers, shareholders and employees have all been beneficiaries of Kevin’s disciplined financial management and his commitment to ensure that owners of TI shares get a good return on their investment.”
“The company’s financial systems and its balance sheet have never been stronger thanks to his oversight.”
http://blogs.barrons.com/techtraderdaily/2016/12/01/texas-instruments-cfo-march-to-retire-after-13-years-controller-lizardi-next-cfo/
March will stay on through October of next year to “oversee the transition duties.”
Shares of TI were down a penny in late trading at $70.40.
Lizardi, age 44, joined TI in 2001 after a career as a captain in the U.S. Army Corps of Engineers, the company said.
TI CEO Rich Templeton remarked on Lizardi’s “discipline” and “integrity,” saying that his “years in finance and controller positions for our manufacturing and our analog product lines have enabled him to develop in-depth knowledge of our semiconductor operations.”
He also thanked March, saying that “customers, shareholders and employees have all been beneficiaries of Kevin’s disciplined financial management and his commitment to ensure that owners of TI shares get a good return on their investment.”
“The company’s financial systems and its balance sheet have never been stronger thanks to his oversight.”
http://blogs.barrons.com/techtraderdaily/2016/12/01/texas-instruments-cfo-march-to-retire-after-13-years-controller-lizardi-next-cfo/
Thursday, December 1, 2016
Falling smartphone IC ASPs discouraging device vendors from developing chips in-house
Device vendors including Xiaomi, LG Electronics and Sony
have all expressed their intention to develop smartphone chips in-house.
Nevertheless, the average selling price for smartphone SoCs has been
trending down, while the cost of developing advanced chips using 10nm
and below process technologies is high.
Consequently,
these device vendors are being discouraged from developing their own
smartphone SoCs, and will be cautious about increasing adoption of
in-house developed chips in their own-brand smartphones, according to
market sources.
The decelerating global smartphone
market is another factor discouraging those device vendors' development
of chips particularly high-end ones in-house, said the sources. With the
industry heading towards sub-10nm nodes, the cost of developing
advanced chips is pretty high. Profits from selling devices may not be
able to offset the cost paid for the effort, the sources indicated.
Meanwhile,
despite being less optimistic about profits made from their in-house
developed chip businesses, Apple, Samsung and Huawei are gearing up to
introduce their next-generation products built using 10nm process
technology in 2017, the sources noted.
The smartphone
market growth has been decelerating in 2016. Among the first-tier
smartphone vendors, Apple could be the only one able to maintain its
usual profit growth in 2016, according to sources at Taiwan-based IC
design houses. Meanwhile, China-based Oppo and Vivo will continue to
improve their EPS while other brand smartphone firms will likely see
their earnings shrink or even suffer losses, said the sources.
http://www.digitimes.com/news/a20161201PD204.html
Wednesday, November 30, 2016
Texplained opens Nice lab for IC analysis
Three year-old French reverse-engineering and IC security analysis
company Texplained of Sophia Antipolis, near Nice, has opened a new
laboratory.
The lab offers analyses of microchip security and helps companies protect ICs against counterfeiting and piracy.
“Microchips are extremely vulnerable to security threats,” says Texplained CEO Olivier Thomas, “we approach, assess and solve microchip security issues with a different mindset – half hacker, half engineer with electronics knowledge. Armed with this unique mindset and the latest laboratory technologies, our pioneering ‘savoir-faire’ enables us to solve our clients’ microchip security issues on a worldwide basis.”
Texplained provides its clients with services including auditing the security of ICs, backdoor research and IP infringement investigation.
Texplained’s clients include microchip manufacturers, government organisations and systems integrators that integrate microchips into their products.
Texplained believes that it is one of the only companies in the market to specialise solely in microchip reverse engineering and security.
Building a new lab in-house enables Texplained to reverse engineer microchips and analyse ICs using the latest imaging and deprocessing technologies.
The process involves removing the five to 20 layers of metal and oxide that typically make up a chip.
This requires a combination of different chemical and mechanical processes. After the delayering, Texplained scans images of these microscopic layers with a scanning electron microscope. The Texplained team then uses its proprietary ARES ‘automated reverse engineering software’ to analyse the images of the circuits on each layer.
Texplained’s new lab provides clients with a greater depth of analysis more quickly and cost-effectively. With Texplained housing all the technologies and processes for microchip analysis in its new lab, clients can enjoy more security and flexibility as they now no longer have to outsource their microchip analysis to multiple partners to obtain reliable results.
http://www.electronicsweekly.com/news/business/texplained-opens-nice-lab-ic-analysis-2016-11/
The lab offers analyses of microchip security and helps companies protect ICs against counterfeiting and piracy.
“Microchips are extremely vulnerable to security threats,” says Texplained CEO Olivier Thomas, “we approach, assess and solve microchip security issues with a different mindset – half hacker, half engineer with electronics knowledge. Armed with this unique mindset and the latest laboratory technologies, our pioneering ‘savoir-faire’ enables us to solve our clients’ microchip security issues on a worldwide basis.”
Texplained provides its clients with services including auditing the security of ICs, backdoor research and IP infringement investigation.
Texplained’s clients include microchip manufacturers, government organisations and systems integrators that integrate microchips into their products.
Texplained believes that it is one of the only companies in the market to specialise solely in microchip reverse engineering and security.
Building a new lab in-house enables Texplained to reverse engineer microchips and analyse ICs using the latest imaging and deprocessing technologies.
The process involves removing the five to 20 layers of metal and oxide that typically make up a chip.
This requires a combination of different chemical and mechanical processes. After the delayering, Texplained scans images of these microscopic layers with a scanning electron microscope. The Texplained team then uses its proprietary ARES ‘automated reverse engineering software’ to analyse the images of the circuits on each layer.
Texplained’s new lab provides clients with a greater depth of analysis more quickly and cost-effectively. With Texplained housing all the technologies and processes for microchip analysis in its new lab, clients can enjoy more security and flexibility as they now no longer have to outsource their microchip analysis to multiple partners to obtain reliable results.
http://www.electronicsweekly.com/news/business/texplained-opens-nice-lab-ic-analysis-2016-11/
Tuesday, November 29, 2016
Intel to Team With Delphi and Mobileye for Self-Driving Cars
Today’s
automobiles are often described as computers on wheels, for the scores
of processors and chips they use to control everything, including the
transmission, brakes, power windows and navigation system.
The
advent of self-driving cars may require the equivalent of a
supercomputer on wheels. Which is why three technology companies in the
field — Intel, Delphi Automotive and Mobileye — plan to collaborate in an alliance to be announced Tuesday.
For
Intel, especially, it will be an effort to catch up in autonomous
vehicles, a field where some chip makers have made deeper inroads.
The
processing power required to scan the road, identify pedestrians and
fuse images from radar, cameras and other sensors — all in real time —
is spurring a race to provide increasingly complex computer brains that
will dwarf those found in cars today.
The
competition is reflected in the partnership being announced on Tuesday,
in which Intel will provide specialized computer chips to Delphi, an
auto supplier, and Mobileye, an Israeli company that specializes in
vision systems that have been used in some of the autonomous-driving
systems made by Tesla Motors.
Within
about two years, Delphi and Mobileye hope to offer automakers a system
that can give less expensive cars and trucks the intelligence to drive
themselves. At the center will be a package of Mobileye and Intel chips
capable of computing about 20 trillion mathematical operations a second,
Glen DeVos, Delphi’s vice president of engineering and services, said
in an interview on Monday.
A later version of the system, he said, will aim to have two to three times that processing power.
“To
be able to do all the computation you need for a fully automated
vehicle, you can almost never have too much processing power,” he said.
An
Intel spokeswoman confirmed the partnership. She said Delphi and
Mobileye would begin using the Core i7 Intel chip, and later would use a
more powerful and unnamed processor to be unveiled in a few weeks.
The
partnership is the latest by Intel in its bid to muscle into the
rapidly expanding automotive chip business. Nvidia, Qualcomm and a few
other companies are ahead of Intel, which once dominated the personal
computer business but has struggled to duplicate that success in other
areas, including mobile devices and automobiles.
Intel
announced this month that it would invest $250 million in start-ups
working on automated-driving technologies. In July it formed a
partnership with Mobileye and the German automaker BMW to provide chips
for a self-driving car that BMW intends to begin producing by 2021.
“Intel
is looking to get into the automotive space because the demand for
processing power in cars is going to skyrocket,” said Michael Ramsey, an
analyst at Gartner Group who follows automated driving trends.
According
to Gartner, the automotive semiconductor business generated revenue of
nearly $30 billion in 2015, up from nearly $15 billion in 2003.
Specialized
chips are one of the essential technologies needed to make self-driving
cars a reality. To perform safely and competently, autonomous vehicles
need radar to detect obstacles, cameras to identify pedestrians and the
color of traffic lights, highly detailed 3-D maps to determine the
vehicle’s precise position and superfast computer brains to pull all of
this information into split-second decisions.
“You’re
taking in vast amounts of visual data, and you have to process it
really fast, with no delay,” Mr. Ramsey said. “It all has to happen in
real time.”
Intel
faces formidable competition. Nvidia makes a processing unit that Audi
is putting into its newest models, and another that Tesla has just
started using its cars.
The
Nvidia device used by Tesla, called the Drive PX 2, can compute 24
trillion operations a second. Nvidia recently demonstrated a more
powerful version called Xavier.
“Intel
is a very powerful company,” said Danny Shapiro, Nvidia’s senior
directive of automotive technology. “But they are coming late to the
game. We have been in this space a long time already.”
Mr.
DeVos said Delphi chose to work with Intel because the chip maker had a
plan to produce increasingly powerful automotive processors, and the
scale to make the system affordable for mainstream cars.
“It’s all about getting to mass production,” he said.
Delphi
is using its own radar technology and Mobileye’s image processing
system, with self-driving algorithms developed by Ottomatika, a company
spun off from Carnegie Mellon University.
Ottomatika, which Delphi acquired last year, is a source for many of the basic technologies used in autonomous vehicles.
Correction: November 29, 2016
An earlier version of this article misstated the number of operations per second that Nvidia’s Drive PX2 can compute. It is 24 trillion operations a second, not 24 million.
http://www.nytimes.com/2016/11/29/business/intel-to-team-with-delphi-and-mobileye-for-self-driving-cars.html?WT.mc_id=SmartBriefs-Newsletter&WT.mc_ev=click&ad-keywords=smartbriefsnl&_r=0
An earlier version of this article misstated the number of operations per second that Nvidia’s Drive PX2 can compute. It is 24 trillion operations a second, not 24 million.
http://www.nytimes.com/2016/11/29/business/intel-to-team-with-delphi-and-mobileye-for-self-driving-cars.html?WT.mc_id=SmartBriefs-Newsletter&WT.mc_ev=click&ad-keywords=smartbriefsnl&_r=0
Monday, November 28, 2016
Infineon acquisition aims at mass deployment of Lidar
Infineon has got into the Lidar business by acquiring the Dutch company
Innoluce. Infineon’s aim is to reduce the cost of Lidar so far that it
can be widely deployed.
“We have further strengthened our leading position in automated driving by entering the Lidar market through the acquisition of Innoluce, a fabless semiconductor company headquartered in the Netherlands,” Infineon CEO Reinhard Ploss (pictured) told shareholders earlier this week.
Innoluce has developed solid state laser scanning modules, based on resonant 1D MEMS mirror technology and integrated ASIC, which delivers a wide range of applications including holographic imaging, minimally invasive surgery and lithography..
“Innoluce specializes in MEMS-based scanning mirrors for laser beams,” said Ploss, “current Lidar systems that will be introduced in premium cars within the next couple of years are based on mechanical scanning mirrors which make them bulky and rather expensive to become a standard feature in all car classes. Lidar systems need to semiconductor based.”
“Innoluce’s technology, combined with our expertise, allows the development of compact, cost effective and robust semiconductor based Lidar systems for mass deployment,” added Ploss.
http://www.electronicsweekly.com/news/business/infineon-acquisition-aims-mass-deployment-lidar-2016-11/
“We have further strengthened our leading position in automated driving by entering the Lidar market through the acquisition of Innoluce, a fabless semiconductor company headquartered in the Netherlands,” Infineon CEO Reinhard Ploss (pictured) told shareholders earlier this week.
Innoluce has developed solid state laser scanning modules, based on resonant 1D MEMS mirror technology and integrated ASIC, which delivers a wide range of applications including holographic imaging, minimally invasive surgery and lithography..
“Innoluce specializes in MEMS-based scanning mirrors for laser beams,” said Ploss, “current Lidar systems that will be introduced in premium cars within the next couple of years are based on mechanical scanning mirrors which make them bulky and rather expensive to become a standard feature in all car classes. Lidar systems need to semiconductor based.”
“Innoluce’s technology, combined with our expertise, allows the development of compact, cost effective and robust semiconductor based Lidar systems for mass deployment,” added Ploss.
http://www.electronicsweekly.com/news/business/infineon-acquisition-aims-mass-deployment-lidar-2016-11/
Wednesday, November 23, 2016
Spray-on process yields quality organic semiconductors
UK scientists have grown high-quality mono-crystals of organic
semiconductors, which are large enough to construct FETs on. Such FETs
show good clean characteristic curves, although have comparatively low
mobility.
A common way to create organic semiconductor crystals is to dissolve the material in a solvent, then deposit the solution onto a surface. Subsequent evaporation of the solvent leaves behind crystals of the semiconductor, with slower evaporation favouring the creation of larger crystals.
However, said a team of researchers from the University of Surrey and the National Physical Laboratory, these crystals are still comparatively small and generally yield only poly-crystalline transistors.
The technique invented by Surrey and NPL to grow larger crystals involves an ‘anti-solvent’ process.
In this, the organic semiconductor is dissolved in a volatile (easily-evaporated) solvent while, separately, the substrate is coated with a second solvent – dubbed the anti-solvent.
Anti-solvent
Solvent and anti-solvent are selected so that the organic semiconductor is less-soluble (or sometimes insoluble) in the anti-solvent.
And, in this case, the anti-solvent is selected to have a higher boiling point (be less volatile) than the solvent, and have a higher surface tension than the solvent.
Spraying the dissolved semiconductor gently onto the anti-solvent-coated substrate, results in a process that yields crystals of organic semiconductor floating in the anti-solvent as the solvent evaporates away.
Because the spraying is gentle, all this happens in the upper part of the anti-solvent layer, away from any disruptive substrate effects. As such, the crystals grow with few defects – confirmed by polarised optical microscopy, scanning electron microscopy, x-ray diffraction and polarised Raman spectroscopy, emphasised the University of Surrey.
Under the right conditions, these crystals are regular – a similar shape to a microscope slide – and over 20μm along the short side.
Subsequent evaporation of the anti-solvent lands these crystals on the substrate.
Solution shearing
The substrate has little effect on crystal formation, but – through a process called ‘solution shearing’ – the angle at which the spray hits the anti-solvent, and the distance from spray nozzle to anti-solvent surface, have a large effect and the size, shape and orientation of resulting crystals, said the University, and solution shearing can be used to control these attributes.
“The trick is to cover the surface with a non-solvent so that semiconductor molecules float on top and self-assemble into highly ordered crystals,” said Dr Maxim Shkunov of the the University of Surrey’s advanced technology institute. “This method is a powerful, new approach for manufacturing organic semiconductor single crystals and controlling their shape and dimensions.”
It works with many organic semiconductors, including anthracene, pentacene, tetracene, anthradithiophene and benzothiphene derivatives, said Surrey.
Most of the research was done with ‘TIPS-PEN’ – a soluble pentacene – dissolved in the volatile solvent toluene. DMF (N,N-dimethylformamide) was used as the anti-solvent as TIPS-PEN hardly dissolves in it.
A slower-evaporating solvent with similar surface tension to DMF yielded non-uniform crystals.
Bottom-contact bottom-gate transistors and the top-contact bottom-gate transistors were fabricated using the crystals, yielding devices with clear FET characteristics and 0.4cm2/Vs mobility, which is low for TIPS-PEN transistors operating in the linear region, said Surrey.
The reasons for low mobility are now under investigation, and improvements are expected.
Full results of the Surrey/NPL research are available in the Nature Communications paper: ‘Spray printing of organic semiconducting single crystals’.
A common way to create organic semiconductor crystals is to dissolve the material in a solvent, then deposit the solution onto a surface. Subsequent evaporation of the solvent leaves behind crystals of the semiconductor, with slower evaporation favouring the creation of larger crystals.
However, said a team of researchers from the University of Surrey and the National Physical Laboratory, these crystals are still comparatively small and generally yield only poly-crystalline transistors.
The technique invented by Surrey and NPL to grow larger crystals involves an ‘anti-solvent’ process.
In this, the organic semiconductor is dissolved in a volatile (easily-evaporated) solvent while, separately, the substrate is coated with a second solvent – dubbed the anti-solvent.
Anti-solvent
Solvent and anti-solvent are selected so that the organic semiconductor is less-soluble (or sometimes insoluble) in the anti-solvent.
And, in this case, the anti-solvent is selected to have a higher boiling point (be less volatile) than the solvent, and have a higher surface tension than the solvent.
Spraying the dissolved semiconductor gently onto the anti-solvent-coated substrate, results in a process that yields crystals of organic semiconductor floating in the anti-solvent as the solvent evaporates away.
Because the spraying is gentle, all this happens in the upper part of the anti-solvent layer, away from any disruptive substrate effects. As such, the crystals grow with few defects – confirmed by polarised optical microscopy, scanning electron microscopy, x-ray diffraction and polarised Raman spectroscopy, emphasised the University of Surrey.
Under the right conditions, these crystals are regular – a similar shape to a microscope slide – and over 20μm along the short side.
Subsequent evaporation of the anti-solvent lands these crystals on the substrate.
Solution shearing
The substrate has little effect on crystal formation, but – through a process called ‘solution shearing’ – the angle at which the spray hits the anti-solvent, and the distance from spray nozzle to anti-solvent surface, have a large effect and the size, shape and orientation of resulting crystals, said the University, and solution shearing can be used to control these attributes.
“The trick is to cover the surface with a non-solvent so that semiconductor molecules float on top and self-assemble into highly ordered crystals,” said Dr Maxim Shkunov of the the University of Surrey’s advanced technology institute. “This method is a powerful, new approach for manufacturing organic semiconductor single crystals and controlling their shape and dimensions.”
It works with many organic semiconductors, including anthracene, pentacene, tetracene, anthradithiophene and benzothiphene derivatives, said Surrey.
Most of the research was done with ‘TIPS-PEN’ – a soluble pentacene – dissolved in the volatile solvent toluene. DMF (N,N-dimethylformamide) was used as the anti-solvent as TIPS-PEN hardly dissolves in it.
A slower-evaporating solvent with similar surface tension to DMF yielded non-uniform crystals.
Bottom-contact bottom-gate transistors and the top-contact bottom-gate transistors were fabricated using the crystals, yielding devices with clear FET characteristics and 0.4cm2/Vs mobility, which is low for TIPS-PEN transistors operating in the linear region, said Surrey.
The reasons for low mobility are now under investigation, and improvements are expected.
Full results of the Surrey/NPL research are available in the Nature Communications paper: ‘Spray printing of organic semiconducting single crystals’.
Tuesday, November 22, 2016
Market for 10nm mobile chips to heat up in 2017
Cage Chao, Taipei; Jessie Shen, DIGITIMES [Tuesday 22 November 2016]
Qualcomm, Samsung Electronics, MediaTek, Apple and
Spreadtrum Communications are gearing up to roll out their 10nm mobile
chips which will be shipped in smartphones during 2017.
Qualcomm
recently announced its 10nm mobile chips will be built by Samsung's
foundry business. Qualcomm's Snapdragon 835 is in production now and
expected to ship in commercial devices in the first half of 2017, the
company said.
Samsung's next-generation Exynos series
will also be built in-house using 10nm process technology. Mass
production of Samsung's 10nm Exynos mobile chips is expected to kick off
in the first half of 2017, according to industry sources.
MediaTek
will reportedly roll out two 10nm mobile chips - the Helio X30 and X35 -
manufactured using TSMC's 10nm FinFET process. MediaTek is among TSMC's
first group of customers adopting 10nm process technology.
MediaTek
is expected to enter volume production for the Helio X30-series SoCs
between the end of 2016 and early-2017, and the X35 series will be built
using a lower-spec variant of the foundry's 10nm processes, according
to previous reports.
TSMC will also be engaged in the
manufacture of 10nm chips for HiSilicon, which will power Huawei's
flagship smartphone series for 2017, industry sources believe.
http://www.digitimes.com/news/a20161121PD211.html
Friday, November 18, 2016
Fluorescent dye could fuel liquid-based batteries
Scientists
at the University at Buffalo have identified a fluorescent dye called
BODIPY as a suitable material for stocking energy in rechargeable,
liquid-based batteries that could one day power small and large scale
devices, including cars and homes.
"All alternative energy sources are intermittent, so we need batteries that can store enough energy to power the average house," explained lead researcher Timothy Cook.
Redox flow batteries consist of two tanks of fluids separated by various barriers.
When the battery is being used, electrons are harvested from one tank and moved to the other, generating an electric current. To recharge the battery, solar, wind or other energy sources would be used to force the electrons back into the original tank.
Redox flow batteries can be enlarged to store more energy – enough to allow a homeowner to power a solar house overnight, for instance, or to enable a utility company to stockpile wind energy for peak usage times.
Also, according to Cook, lithium-ion batteries are risky in that they can catch fire if they break open. If the dye-based batteries ruptured, however, they would simply leak.
"The library of molecules used in redox flow batteries is currently small but is expected to grow significantly in coming years," Cook says. "Our research identifies BODIPY dye as a promising candidate."
The BODIPY compounds display a notable quality: they can give up and receive an electron without degrading. This trait enabled the dye to store electrons and facilitate their transfer between the battery's two ends during repeated cycles of charging and draining.
Based on the experiments, scientists predicted BODIPY batteries could generate 2.3V of electricity.
Wednesday, November 16, 2016
8pin logic package for mobile, portable and IoT apps
The leadless logic package for 8 lead logic functions from NXP Semiconductors is said to be the world’s smallest.
With the 8pin package, it is said that most Mini Logic functions are available. The logic devices are used to provide the interface between the different ASICs. Standard functions include LVC, AUP and AXP, as well as inverters, buffers, Flip-flops, combination logic, and OR, AND, NAND and NOR dual gates.
http://www.newelectronics.co.uk/electronics/electronica-8pin-logic-package-for-mobile-portable-and-iot-applications/148158/
Tuesday, November 15, 2016
IBM, Nvidia target deep learning, AI workloads
IBM and Nvidia said they are collaborating on a deep learning tool that trains computers faster and scales better.
Specifically, IBM launched a software kit dubbed PowerAI that will run on its OpenPOWER LC servers for high performance computing.
The Power S822LC for high performance computing (HPC) uses Nvidia NVLink technology to work with IBM's architecture. IBM and Nvidia said that the S822LC system can run AlexNet with Caffe faster than x86 servers with multiple configurations.
Caffe is a deep learning framework created by Berkeley Vision and Learning Center (BVLC). Caffe is widely used, but IBM's PowerAI tookit supports another four deep learning software packages.
IBM and Nvidia see HPC as a growth market as more enterprises adopt deep learning for big data and analytics workloads. Both companies are members of the OpenPOWER Foundation, which aims to spread the POWER architecture in the data center.
Big Blue's POWER8 processor is integrated with Nvidia's Tesla P100 Pascal GPU accelerators in the S822LC systems. IBM said the new servers are being used to study the human brain, crunch data and supercomputing.
http://www.zdnet.com/article/ibm-nvidia-target-deep-learning-ai-workloads/
Specifically, IBM launched a software kit dubbed PowerAI that will run on its OpenPOWER LC servers for high performance computing.
The Power S822LC for high performance computing (HPC) uses Nvidia NVLink technology to work with IBM's architecture. IBM and Nvidia said that the S822LC system can run AlexNet with Caffe faster than x86 servers with multiple configurations.
Caffe is a deep learning framework created by Berkeley Vision and Learning Center (BVLC). Caffe is widely used, but IBM's PowerAI tookit supports another four deep learning software packages.
IBM and Nvidia see HPC as a growth market as more enterprises adopt deep learning for big data and analytics workloads. Both companies are members of the OpenPOWER Foundation, which aims to spread the POWER architecture in the data center.
Big Blue's POWER8 processor is integrated with Nvidia's Tesla P100 Pascal GPU accelerators in the S822LC systems. IBM said the new servers are being used to study the human brain, crunch data and supercomputing.
http://www.zdnet.com/article/ibm-nvidia-target-deep-learning-ai-workloads/
Monday, November 14, 2016
Three major China firms gearing up to enter DRAM market
Yangtze River Storage Technology (YRST), Fujian Jin Hua
Integrated Circuit, and a joint venture set up by GigaDevice
Semiconductor and the Hefei city government of China's Anhui province,
are all gearing up to compete in the DRAM field and targeting to become
China's largest DRAM producer, according to industry observers.
YRST
is being supported by China's state-backed tech conglomerate Tsinghua
Unigroup. YRST is evaluating the possibility of acquiring an existing
12-inch wafer fab or building a brand new one in Nanjing that will be
dedicated to producing DRAM and NAND flash chips, the sources indicated.
YRST
already has a 12-inch memory fab in Wuhan run by subsidiary Wuhan
Xinxin Semiconductor Manufacturing (XMC), which is expected to produce
China's first homegrown 3D NAND flash devices as early as end-2017, the
sources said. YRST would use technology from Cypress (formerly Spansion)
to produce 32- and 64-layer 3D NAND chips.
As for
technology to make DRAM, YRST is exploring the feasibility of
cooperation with three major vendors particularly Micron Technology, the
sources noted.
Meanwhile, Fujian Jin Hua Integrated
Circuit is constructing a new 12-inch wafer fab, which will be engaged
in the manufacture of DRAM products using production technology
developed by Taiwan's United Microelectronics (UMC), the sources said.
Jin Hua is owned by the Fujian government.
UMC with
funding from Jin Hua has assigned a group of engineers to develop
25/30nm process technologies at the Taiwan-based foundry's manufacturing
site in Tainan, southern Taiwan, the sources indicated. The
technologies, developed in-house by UMC, will be used for the
manufacture of DRAM products at Jin Hua's 12-inch fab in Quanzhou,
Fujian.
Jin Hua with government support has reportedly
poured almost NT$10 billion (US$312.6 million) into UMC's development of
DRAM technologies, which is set to complete by the end of 2017 to allow
Jin Hua's new 12-inch fab to enter volume production by 2018, the
sources noted.
UMC in mid-2016 disclosed the company
had signed an agreement for technical cooperation with Jin Hua to
develop DRAM-chip production technology. The developed technologies will
be jointly owned by both Jin Hua and UMC, UMC said. Financial terms
were not disclosed.
The sources also identified another
potential China-based DRAM player. A joint venture will be set up
between GigaDevice and the Hefei government to enter the design,
development and manufacture of DRAM memory, according to the sources.
The
three major China-based DRAM players are expected to emerge and compete
for the title of China's number-one DRAM producer starting 2018, the
sources said.
http://www.digitimes.com/news/a20161114PD201.html
Friday, November 11, 2016
SMIC Expects Record Roll to Continue
TAIPEI—Semiconductor
Manufacturing International Corp. (SMIC), China’s largest foundry, said
it expects strength in its business to continue as it rides a wave of
demand in China.
The company forecast in a conference call to announce its
third-quarter results that sales in the current quarter will rise as
much as 7 percent from the record $774.8 million in revenue it posted
during the July to September period this year.
“SMIC is seeing robust demand across the board, and we
reiterate our growth target of 20% compounded annual growth from 2016 to
2019,” said SMIC CEO Tzu-Yin Chiu. “In 2016, SMIC is growing in excess
of 28 year on year. We are forecasting growth for both the fourth
quarter of 2016 and the first quarter of 2017. We are on track to
achieve another record year of revenue and net profit.”
China accounted for 51.6 percent of SMIC’s sales during the third quarter, followed by North America with 28.3 percent. Communications chips are SMIC’s largest segment by sales. The company’s cash cow process technology is 40/45nm, more than two generations behind larger foundry rivals such as Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung.
Even so, SMIC has been cruising along at nearly full utilization in its six fabs in the Chinese cities of Shanghai, Beijing, Tianjin and Shenzhen since the middle of 2015. In addition, the company has completed the takeover of LFoundry in Italy this year. The company said it will nudge up capital expenditures in 2016 to $2.6 billion from the $2.5 billion it planned earlier this year, with the increase in capex going toward expanded output of 55nm products.
SMIC said it is likely that the company’s 2017 capex will be less than the $2.6 billion budgeted for this year.
SMIC said it expects to outpace global industry growth during the next few years.
28nm
The company expects to double its revenue from its leading edge 28nm process during the fourth quarter this year from the amount it made during the third quarter. That process node accounted for 1.4 percent of overall sales in the third quarter.
SMIC said it aims to expand output at its Beijing fab to meet demand for 28nm and 40nm products. The company is ramping 8-inch and 12-inch production at several locations with a combination of second-hand and new equipment.
SMIC's largest competitors are years ahead with process technology. TSMC expects to see its first revenue from 10nm during the first quarter of 2017.
http://www.eetimes.com/document.asp?doc_id=1330810
Thursday, November 10, 2016
Toshiba catching up with Samsung in 3-D NAND chips
SEOUL, Nov. 10 (Yonhap) -- Japan's Toshiba Corp. is rapidly catching
up with Samsung Electronics Co. in the global market for advanced flash
memory chips for mobile devices, or 3-D NAND chips, according to
industry observers Thursday.
Toshiba announced earlier this week that it will build a fabrication facility in February next year to begin production of the 3-D NAND chips.
"Decisions on the new fab's overall capacity and equipment investment, the start of production, production capacity and production plan will reflect market trends," Toshiba said in a statement.
Toshiba also said it will continue cooperation with Western Digital for their joint venture on flash memory chips.
According to a market tracker DRAMeXchange, Samsung accounted for 36.3 percent of the global market for NAND flash memory chips, while Toshiba's market share stood at 20.1 percent.
Samsung started mass production of the 48-layer 3-D NAND chips in 2013 and is believed to begin mass production of next-generation 64-layer 3-D NAND chips at the end of this year.
Although Toshiba will expand its facility for the 3-D NAND chips, an industry observer said it may be difficult for Toshiba to mass-produce such chips.
http://english.yonhapnews.co.kr/business/2016/11/10/0502000000AEN20161110007500320.html
Toshiba announced earlier this week that it will build a fabrication facility in February next year to begin production of the 3-D NAND chips.
"Decisions on the new fab's overall capacity and equipment investment, the start of production, production capacity and production plan will reflect market trends," Toshiba said in a statement.
Toshiba also said it will continue cooperation with Western Digital for their joint venture on flash memory chips.
According to a market tracker DRAMeXchange, Samsung accounted for 36.3 percent of the global market for NAND flash memory chips, while Toshiba's market share stood at 20.1 percent.
Samsung started mass production of the 48-layer 3-D NAND chips in 2013 and is believed to begin mass production of next-generation 64-layer 3-D NAND chips at the end of this year.
Although Toshiba will expand its facility for the 3-D NAND chips, an industry observer said it may be difficult for Toshiba to mass-produce such chips.
http://english.yonhapnews.co.kr/business/2016/11/10/0502000000AEN20161110007500320.html
Wednesday, November 9, 2016
Qualcomm strikes deal for cooperation with Taiwan MOEA
Qualcomm and Taiwan's Ministry of Economic Affairs (MOEA)
have signed a MoU on cooperation in the wireless communications sector
including joint development of IoT, 4G and 5G networks, and technologies
for connected cars, according to MOEA.
Qualcomm will
also set up a lab in Taiwan according to the deal. The lab is expected
to be a platform to share technology and information to assist Taiwan's
industry supply chains to play an important role in the world's
deployment of next-generation wireless technologies, MOEA indicated.
The
Taiwan government-sponsored Industrial Technology Research Institute,
local OEMs and ODMs, and mobile operators and solution providers will be
able to work with Qualcomm to jointly develop next-generation wireless
technologies, MOEA said.
http://www.digitimes.com/news/a20161108PD212.html
Tuesday, November 8, 2016
Supercapacitors Have Optimal Pulse Power Handling Characteristics
AVX Corporation has released a new series of supercapacitor modules
composed of series-connected cylindrical, electrochemical and
double-layer supercapacitors. The SCM Series supercapacitor modules come
in two voltage ratings (5 V and 5.4 V) and exhibit optimal pulse power
handling characteristics, including: high capacitance values (0.47 F–7.5
F ±20% tolerance), low ESR (4 mΩ–300 mΩ at 1,000 KHz), low leakage (2
µA–1,000 µA), high energy density (1 to 5.6 Wh/kg), and long lifetime
performance (50,000+ cycles).
The SCM Series modules can be used alone or in conjunction with primary or secondary batteries to provide extended back-up time, longer battery life and instantaneous pulse power in applications, including uninterrupted power supplies (UPS), wireless alarms, remote meters, global systems mobile (GSM) and galvanic skin response (GSR) transmissions, camera flash systems, scanners, toys and games.
The modules are rated for operating temperatures spanning –40° C to +65° C at 5.0–5.4 V balanced, or, with voltage de-rated to 3.9–4.6V per cell, –40° C to +85° C balanced. Unbalanced options are also available.
Packaged in plastic or shrink-wrapped cases spanning 14 mm to 24 mm in length with vertical or horizontal radial leads, the series is compatible with hand, reflow and wave soldering as long as appropriate precautions are enacted. The series is both lead-free compatible and RoHS compliance compatible.
All SCM Series parts are tested and qualified for life cycle, high temperature load-life, temperature and humidity characteristics, and vibration resistance, and they are shipped in bulk packaging. Current lead-time for the series is four to eight weeks, and custom modules are available upon request.
http://electronics360.globalspec.com/article/7629/supercapacitors-have-optimal-pulse-power-handling-characteristics
The SCM Series modules can be used alone or in conjunction with primary or secondary batteries to provide extended back-up time, longer battery life and instantaneous pulse power in applications, including uninterrupted power supplies (UPS), wireless alarms, remote meters, global systems mobile (GSM) and galvanic skin response (GSR) transmissions, camera flash systems, scanners, toys and games.
The modules are rated for operating temperatures spanning –40° C to +65° C at 5.0–5.4 V balanced, or, with voltage de-rated to 3.9–4.6V per cell, –40° C to +85° C balanced. Unbalanced options are also available.
Packaged in plastic or shrink-wrapped cases spanning 14 mm to 24 mm in length with vertical or horizontal radial leads, the series is compatible with hand, reflow and wave soldering as long as appropriate precautions are enacted. The series is both lead-free compatible and RoHS compliance compatible.
All SCM Series parts are tested and qualified for life cycle, high temperature load-life, temperature and humidity characteristics, and vibration resistance, and they are shipped in bulk packaging. Current lead-time for the series is four to eight weeks, and custom modules are available upon request.
http://electronics360.globalspec.com/article/7629/supercapacitors-have-optimal-pulse-power-handling-characteristics
Friday, November 4, 2016
Marvell to Divest Businesses, Lay Off 900
Marvell
Technology Group is divesting unspecified non-strategic businesses,
reducing R&D spending and laying off 17% of its workforce -- 900
employees.
Marvell Technology Group Ltd.
(Nasdaq: MRVL) plans to complete this restructuring by the end of
October 2017. It said it expects these actions will lead to lower annual
operating expenses from a current annualized run rate of $1.08 billion
to somewhere between $820 million and $840 million.
The company said it intends to cut costs by cutting some R&D programs, streamlining engineering processes and consolidating R&D sites for greater efficiency, all of which will lead to the layoffs. Marvell also expects to cut legal and accounting costs. Marvell estimates it will incur charges of anywhere from $90 million to $110 million associated with the restructuring.
As for the businesses the company intends to divest, it said only that they together represent about $60 million in operating expenses and $100 million in revenue, based on a first half of fiscal 2017 annualized run rate.
In recent months, Marvell has been identifying itself as "a world leader in storage, cloud infrastructure, Internet of Things (IoT), connectivity and multimedia semiconductor solutions," but in the announcement of its restructuring, the company dropped any mention of IoT and multimedia.
In his canned comment accompanying the announcement, Marvell President and CEO Matt Murphy also skipped mention of IoT and multimedia. "The single biggest factor limiting the potential of the Cloud and utilization of billions of connected devices is the bandwidth of today's technology. By focusing on our strengths in storing, moving and accessing data at high speeds, Marvell is well-positioned to enable the technology of tomorrow," he wrote.
Asked by Light Reading specifically about IoT and multimedia, a Marvell spokesman declined to comment.
The company said it will provide specifics, including the identities of the businesses it is considering divesting, during its regularly scheduled conference call regarding its third-quarter results, which will be on November 17.
http://www.lightreading.com/components/comms-chips/marvell-to-divest-businesses-lay-off-900/d/d-id/727561
Thursday, November 3, 2016
Qualcomm reports better-than-expected quarterly revenue
Smartphone chipmaker Qualcomm Inc, which agreed to buy NXP Semiconductors NV for about $38 billion last week, reported a better-than-expected 13.3 percent rise in quarterly revenue, helped by strong demand, particularly in China.
The company's shares were marginally higher in after-hours trading on Wednesday.
The San Diego-based company, which supplies chips to Android smartphone makers and Apple Inc, reported mobile chip shipments of 211 million for the quarter compared with its own forecast of 195 million-215 million.
Analysts on average had expected shipment of 206.1 million in the quarter, according to research firm FactSet StreetAccount.
"Our chipset business is also benefiting from a strong new product ramp across tiers, particularly with fast growing OEMs in China," said Qualcomm Chief Executive Officer Steve Mollenkopf.
Qualcomm gets the bulk of its revenue from chip sales but most of its profit comes from wireless patents it licenses to the mobile industry.
The NXP deal - the largest-ever in the semiconductor industry - would make Qualcomm the leading supplier to the fast-growing automotive chips market.
Qualcomm said it expects revenue of $5.7 billion-$6.5 billion for the current quarter. Analysts had expected $6.15 billion, according to Thomson Reuters I/B/E/S.
Net income attributable to Qualcomm rose to $1.60 billion, or $1.07 per share, in the fourth quarter ended Sept. 25, from $1.06 billion, or 67 cents per share, a year earlier. (bit.ly/2f1RLQQ)
Revenue rose to $6.18 billion from $5.46 billion.
http://www.reuters.com/article/us-qualcomm-results-idUSKBN12X2IR
Wednesday, November 2, 2016
Samsung Electronics to invest more than $1 billion in U.S. chip production
Samsung Electronics Co Ltd (005930.KS) said on Tuesday it planned to invest more than $1 billion by the end of June 2017 to boost production of system chips at its Austin, Texas, facilities in the United States to meet growing demand.
The South Korean firm, the world's second-largest chipmaker behind Intel Corp (INTC.O), said in a statement its investment would boost output of chips for mobile and other electronics devices from its existing facilities in the city.
The investment comes after Samsung said last week its capital expenditure for 2016 would rise to a record 27 trillion won ($24 billion), with 13.2 trillion won earmarked for its semiconductor business.
While most of Samsung's semiconductor profits come from memory chip sales, it has been trying to boost earnings from other products including its own Exynos mobile processors and contract manufacturing deals with clients such as Qualcomm Inc (QCOM.O) and Nvidia Corp (NVDA.O).Samsung did not give further details for its investment plans in Austin, such as how much production capacity would be added.
http://www.reuters.com/article/us-samsung-elec-investment-idUSKBN12W40K
Tuesday, November 1, 2016
President Obama announces semiconductor industry working group to review U.S. competitiveness
President Barack Obama’s Council of Advisors on Science & Technology (PCAST) today announced
the launch of a new Semiconductor Working Group that will provide
recommendations to address the rapid rise of semiconductor businesses
abroad.
Chips are the heart of everything electronic, and they have become a $330 billion worldwide industry. U.S. companies have held the leading market share in the industry — which puts the “silicon” in Silicon Valley — for decades. The Semiconductor Working Group includes 11 experts on chips and the broader economy.
John Neuffer, president of the Semiconductor Industry Association, the U.S. industry trade group, said in a statement:
Neuffer said that semiconductors are a “fundamental building block for U.S. technology leadership. They enable commercial innovations that drive economic growth and productivity, as well as strategically important platforms that ensure U.S. national security, such as satellites and supercomputers. The chip industry spawns new industries, makes existing industries more productive, and drives advances once never imagined.”
To stay ahead in the tech, the U.S. needs a vibrant industry. Neuffer said, “We view today’s announcement as helpful for assessing, analyzing, and formulating recommendations to this and the next Administration on how to maintain U.S. leadership in this key sector. We look forward to working with the PCAST Semiconductor Working Group and hope this and other efforts can lead to a more comprehensive and robust national strategy to spur greater competitiveness, innovation, and research and development in the U.S. semiconductor industry.”
The President’s Council of Advisors on Science and Technology (PCAST) just announced the formation of a new working group focused on strengthening the U.S. semiconductor industry in ways that benefit the nation’s economic and security interests — big news for our industry and the tech sector, in general.
The full working group includes the following members:
http://venturebeat.com/2016/10/31/president-obama-announces-semiconductor-industry-working-group-to-review-u-s-electronics-competitiveness/
Chips are the heart of everything electronic, and they have become a $330 billion worldwide industry. U.S. companies have held the leading market share in the industry — which puts the “silicon” in Silicon Valley — for decades. The Semiconductor Working Group includes 11 experts on chips and the broader economy.
John Neuffer, president of the Semiconductor Industry Association, the U.S. industry trade group, said in a statement:
SIA welcomes this timely announcement, given new challenges facing the U.S. semiconductor industry, including unprecedented government investment programs from some countries and the increasing technological complexity involved in achieving new innovation breakthroughs. These developments have implications not only for the economy and society, but also national security. In fact, SIA earlier recommended the Administration form a public-private advisory group to help guide government policy related to improving the competitiveness of the U.S. semiconductor industry.In a related development, Commerce Secretary Penny Pritzker will give a policy address on the importance and future of the U.S. semiconductor industry at the Center for Strategic and International Studies (CSIS) this Wednesday at 1 p.m. EST. The semiconductor industry directly employs 250,000 workers, is the third-largest source of U.S. manufactured exports, and has the highest level of investment in research and development (R&D) as a percentage of sales of any major industry, according to a post by John Holdren and former Intel CEO Paul Otellini, who are co-chairs of the group.
Neuffer said that semiconductors are a “fundamental building block for U.S. technology leadership. They enable commercial innovations that drive economic growth and productivity, as well as strategically important platforms that ensure U.S. national security, such as satellites and supercomputers. The chip industry spawns new industries, makes existing industries more productive, and drives advances once never imagined.”
To stay ahead in the tech, the U.S. needs a vibrant industry. Neuffer said, “We view today’s announcement as helpful for assessing, analyzing, and formulating recommendations to this and the next Administration on how to maintain U.S. leadership in this key sector. We look forward to working with the PCAST Semiconductor Working Group and hope this and other efforts can lead to a more comprehensive and robust national strategy to spur greater competitiveness, innovation, and research and development in the U.S. semiconductor industry.”
The President’s Council of Advisors on Science and Technology (PCAST) just announced the formation of a new working group focused on strengthening the U.S. semiconductor industry in ways that benefit the nation’s economic and security interests — big news for our industry and the tech sector, in general.
The full working group includes the following members:
- John Holdren (director, OSTP; PCAST co-chair); working group co-chair
- Paul Otellini (former president and CEO, Intel); working group co-chair
- Richard Beyer (former chair and CEO, Freescale Semiconductor)
- Wes Bush (chair, CEO, and president, Northrop Grumman)
- John Hennessy (President Emeritus, Stanford University)
- Paul Jacobs (executive chair, Qualcomm)
- Ajit Manocha (former CEO, GlobalFoundries)
- Jami Miscik (co-CEO and vice chairman, Kissinger Associates; co-chair, President’s Intelligence Advisory Board)
- Craig Mundie (president, Mundie and Associates; former senior advisor, Microsoft; member of PCAST)
- Mike Splinter (former CEO and chair, Applied Materials)
- Laura Tyson (Distinguished Professor of the graduate school, UC Berkeley; former CEA chair and NEC director)
http://venturebeat.com/2016/10/31/president-obama-announces-semiconductor-industry-working-group-to-review-u-s-electronics-competitiveness/
Monday, October 31, 2016
Samsung expected to use 20-nano or finer technology for all mobile chips from Q2 next year
SEOUL, Oct. 29 (Yonhap) -- Samsung Electronics Co. is expected to use
20-nanometer processing technology or finer technology to produce all
mobile DRAMs from the second-quarter of next year, according to a market
researcher on Saturday.
Finer processing technology allows a chip manufacturer to improve wafer productivity and produce a semiconductor that consumes less electricity.
According to market researcher DRAMeXchange, about 94 percent of chips produced by Samsung during the fourth-quarter of this year are believed to use 20-nanometer or finer circuit elements.
From the second-quarter of next year, Samsung is expected to stop using 25-nanometer processing technology.
On Oct. 20, Samsung said it has rolled out the semiconductor industry's first 8-gigabyte mobile DRAM package for smartphones, based on its advanced 10-nanometer production technology.
The new package of mobile chips is expected to significantly improve mobile user experiences for those using high-definition, large-screen devices, Samsung said in a statement.
http://english.yonhapnews.co.kr/business/2016/10/29/8/0502000000AEN20161029001600320F.html
Finer processing technology allows a chip manufacturer to improve wafer productivity and produce a semiconductor that consumes less electricity.
According to market researcher DRAMeXchange, about 94 percent of chips produced by Samsung during the fourth-quarter of this year are believed to use 20-nanometer or finer circuit elements.
From the second-quarter of next year, Samsung is expected to stop using 25-nanometer processing technology.
On Oct. 20, Samsung said it has rolled out the semiconductor industry's first 8-gigabyte mobile DRAM package for smartphones, based on its advanced 10-nanometer production technology.
The new package of mobile chips is expected to significantly improve mobile user experiences for those using high-definition, large-screen devices, Samsung said in a statement.
http://english.yonhapnews.co.kr/business/2016/10/29/8/0502000000AEN20161029001600320F.html
Friday, October 28, 2016
To solve IoT security, look at the big picture, ARM says
The recent DDoS attacks launched from IoT devices
demonstrate that the internet of things spans all parts of IT and that
most companies deploying it still need a lot of help.
That's the message from ARM, the chip design company behind nearly every smartphone and a big chunk of IoT, at its annual TechCon event this week in Silicon Valley.
Small, low-power devices like sensors and security cameras are the most visible part of IoT, and they’re right in ARM’s wheelhouse as the dominant force in low-power chips. But on Wednesday, the company highlighted a cloud-based SaaS offering rather than chips or edge devices themselves. IoT depends on back-end capabilities as much as edge devices, and the company wants to play a role in all of it.
The SaaS platform, called mbed Cloud, handles device connection and setup, encryption-key provisioning, and firmware updates. Anyone selling IoT devices or deploying them across an organization can use mbed Cloud for any or all of these functions, ARM says. With some extra work, it can serve non-ARM devices, too.
In recent DDoS attacks, hackers built botnets out of thousands of connected devices. Making them vulnerable were default passwords that were the same on every device, letting attackers take over the devices. So it’s clear that some IoT manufacturers need help locking down products and keeping them secure, ARM executives said.
“It’s no longer just a matter of ‘build a product, throw it over the wall, and let the consumer deal with it,’” said Michael Horne, vice president of marketing and sales in ARM’s IoT division. The mbed Cloud service provides for individual device authentication and ongoing security updates to defend against new threats.
Whether they make baby monitors or jet-engine sensors, many IoT device vendors need outside help on security, IDC analyst Shane Rau said. IoT evolved from specialized, isolated devices built for vertical industries, with no provision for security. Now developers are looking outside their own fields for general features like security. ARM is in a good position to provide those, through offerings like mbed Cloud, because its designs are at the heart of so many embedded chips, he said.
“You can reinvent the wheel, or you can use this,” ARM CEO Simon Segars told reporters at the conference. “We think we can help defragment what is otherwise going to be an incredibly fragmented -- and probably weaker as a result -- set of solutions.”
IoT is ARM’s rallying cry as it marches forward from its recent acquisition by Japanese conglomerate SoftBank. It will use its newfound resources to accelerate development in several areas, key among them being IoT and security, Segars said.
Embedded processors are a fast-growing part of its business, which includes about one-half smartphone chips today.
But ARM’s IoT strategy encompasses more than those billions of devices, Segars said. IoT also involves the servers that crunch the numbers streaming out of those devices and the networks that link the two. ARM-based chips are already widely used in networking. An end-to-end architecture based on ARM chips will help the company make inroads into the server business, where it’s had a hard time gaining a foothold, he said.
The company’s new owner, SoftBank Chairman Masayoshi Son, has said IoT was his main reason to buy ARM. Son meets regularly with ARM management and is on board with its strategy, Segars said. “He completely trusts us to get on with business.”
http://www.itworld.com/article/3136307/internet-of-things/to-solve-iot-security-look-at-the-big-picture-arm-says.html
That's the message from ARM, the chip design company behind nearly every smartphone and a big chunk of IoT, at its annual TechCon event this week in Silicon Valley.
Small, low-power devices like sensors and security cameras are the most visible part of IoT, and they’re right in ARM’s wheelhouse as the dominant force in low-power chips. But on Wednesday, the company highlighted a cloud-based SaaS offering rather than chips or edge devices themselves. IoT depends on back-end capabilities as much as edge devices, and the company wants to play a role in all of it.
The SaaS platform, called mbed Cloud, handles device connection and setup, encryption-key provisioning, and firmware updates. Anyone selling IoT devices or deploying them across an organization can use mbed Cloud for any or all of these functions, ARM says. With some extra work, it can serve non-ARM devices, too.
In recent DDoS attacks, hackers built botnets out of thousands of connected devices. Making them vulnerable were default passwords that were the same on every device, letting attackers take over the devices. So it’s clear that some IoT manufacturers need help locking down products and keeping them secure, ARM executives said.
“It’s no longer just a matter of ‘build a product, throw it over the wall, and let the consumer deal with it,’” said Michael Horne, vice president of marketing and sales in ARM’s IoT division. The mbed Cloud service provides for individual device authentication and ongoing security updates to defend against new threats.
Whether they make baby monitors or jet-engine sensors, many IoT device vendors need outside help on security, IDC analyst Shane Rau said. IoT evolved from specialized, isolated devices built for vertical industries, with no provision for security. Now developers are looking outside their own fields for general features like security. ARM is in a good position to provide those, through offerings like mbed Cloud, because its designs are at the heart of so many embedded chips, he said.
“You can reinvent the wheel, or you can use this,” ARM CEO Simon Segars told reporters at the conference. “We think we can help defragment what is otherwise going to be an incredibly fragmented -- and probably weaker as a result -- set of solutions.”
IoT is ARM’s rallying cry as it marches forward from its recent acquisition by Japanese conglomerate SoftBank. It will use its newfound resources to accelerate development in several areas, key among them being IoT and security, Segars said.
Embedded processors are a fast-growing part of its business, which includes about one-half smartphone chips today.
But ARM’s IoT strategy encompasses more than those billions of devices, Segars said. IoT also involves the servers that crunch the numbers streaming out of those devices and the networks that link the two. ARM-based chips are already widely used in networking. An end-to-end architecture based on ARM chips will help the company make inroads into the server business, where it’s had a hard time gaining a foothold, he said.
The company’s new owner, SoftBank Chairman Masayoshi Son, has said IoT was his main reason to buy ARM. Son meets regularly with ARM management and is on board with its strategy, Segars said. “He completely trusts us to get on with business.”
http://www.itworld.com/article/3136307/internet-of-things/to-solve-iot-security-look-at-the-big-picture-arm-says.html
Thursday, October 27, 2016
Qualcomm to Buy NXP Semiconductors in $47 Billion Deal
Qualcomm Inc., the largest maker of mobile-phone chips, will acquire
NXP Semiconductors NV in a transaction valued at $47 billion, aiming to
speed an expansion into new industries and reduce its dependence on the
smartphone market.
San Diego-based Qualcomm agreed to pay $110 a share in cash for NXP, the biggest supplier of chips used in the automotive industry, or 11 percent more than Wednesday’s close, the companies said in a statement Thursday. The deal will be funded with cash on hand as well as new debt.
Chief Executive Officer Steve Mollenkopf is betting the deal, the largest in the chip industry’s history, will accelerate his company’s entry into the burgeoning market for electronics in cars. Eindhoven, Netherlands-based NXP is strong in that sector following its acquisition last year of Freescale Semiconductor Ltd.
“It’s no secret that we’ve been looking around,” Mollenkopf said in an interview. "If you look at our growth strategy it’s to grow into adjacent markets at the time that they are being disrupted by the technology of mobile.”
The purchase is Qualcomm’s response to slowing growth in demand for smartphones, which provide the bulk of the company’s revenue. The two companies, which will have combined revenue of more than $30 billion, will have products that are capable of winning sales in markets worth $138 billion by 2020, Qualcomm predicted. Two years after the transaction closes, Qualcomm forecast $500 million of annual cost savings.
The equity value of the transaction is $38.5 billion. Including debt, the enterprise value goes up to $47 billion, according to Chief Financial Officer George Davis. The acquisition will add $11 billion of debt to Qualcomm’s balance sheet, which it will be able to rapidly improve by using the overseas cash it generates to pay down, Davis said.
Mollenkopf said he will aim to combine the two companies and their products as quickly as he can and make sure that the management of the combined company has representatives from both sides.
NXP shares rose 1.7 percent to $100.34 at 10:12 a.m. in New York. Qualcomm gained 3.1 percent to $70.32.
“There just isn’t enough mobile growth to be had –- they are already the dominant chip supplier and licenser of intellectual property in an industry where the product is being commoditized and volume growth is moderating,” said Sid Parakh, a fund manager at Becker Capital Management, which owns Qualcomm stock. “As a long-term investor, I would much rather have a more diverse company that has the potential to participate in new markets and probably grow significantly more than it would in a mobile-only world.”
NXP is projected to report 2016 sales of $9.48 billion, the average of analysts’ estimates from data compiled by Bloomberg. By revenue, that makes it less than half the size of Qualcomm, which will report sales of $23.2 billion this year, according to analysts. Still, the Dutch company has averaged about 11 percent growth over the past three years, while the U.S. chipmaker’s sales declined 5 percent last year, a collapse from a revenue increase of 30 percent in 2013.
Like other chipmakers, Qualcomm is targeting what’s called the Internet of Things, the addition of connections and computing power to everything from washing machines to trucks and industrial equipment. The company has pitched prospective new customers with modified mobile-phone chips that it says offer the easiest way to add electronic capabilities to a broader range of devices. That push is in its early stages, with wins in areas such as automotive, where Qualcomm’s chips power entertainment devices and cell-phone connections to cars.“Automotive and industrial are Internet of Things verticals that we see as more profitable for semiconductors, and this is precisely the exposure that Qualcomm would gain with an NXP deal,” Cowen & Co. analyst Timothy Arcuri wrote in a note. “Qualcomm could become the dominant player in connected industrial and automotive applications.”
By buying NXP, which started off life as Koninklijke Philips NV’s chip unit, Qualcomm is taking on the risk of merging with a company that’s in the process of integrating its own acquisition of Freescale. That $16 billion transaction was completed in December. NXP owns factories and produces some of its own chips -- something Qualcomm has avoided by outsourcing its manufacturing -- and has about 44,000 employees, compared with about 33,000 for Qualcomm.
https://www.bloomberg.com/news/articles/2016-10-27/qualcomm-to-buy-nxp-semiconductors-for-47-billion-in-cash
San Diego-based Qualcomm agreed to pay $110 a share in cash for NXP, the biggest supplier of chips used in the automotive industry, or 11 percent more than Wednesday’s close, the companies said in a statement Thursday. The deal will be funded with cash on hand as well as new debt.
Chief Executive Officer Steve Mollenkopf is betting the deal, the largest in the chip industry’s history, will accelerate his company’s entry into the burgeoning market for electronics in cars. Eindhoven, Netherlands-based NXP is strong in that sector following its acquisition last year of Freescale Semiconductor Ltd.
“It’s no secret that we’ve been looking around,” Mollenkopf said in an interview. "If you look at our growth strategy it’s to grow into adjacent markets at the time that they are being disrupted by the technology of mobile.”
The purchase is Qualcomm’s response to slowing growth in demand for smartphones, which provide the bulk of the company’s revenue. The two companies, which will have combined revenue of more than $30 billion, will have products that are capable of winning sales in markets worth $138 billion by 2020, Qualcomm predicted. Two years after the transaction closes, Qualcomm forecast $500 million of annual cost savings.
The equity value of the transaction is $38.5 billion. Including debt, the enterprise value goes up to $47 billion, according to Chief Financial Officer George Davis. The acquisition will add $11 billion of debt to Qualcomm’s balance sheet, which it will be able to rapidly improve by using the overseas cash it generates to pay down, Davis said.
Mollenkopf said he will aim to combine the two companies and their products as quickly as he can and make sure that the management of the combined company has representatives from both sides.
NXP shares rose 1.7 percent to $100.34 at 10:12 a.m. in New York. Qualcomm gained 3.1 percent to $70.32.
Record Consolidation
Last year was a record for chip-industry consolidation, with semiconductor makers getting together to weather rising costs and a shrinking list of customers. Though he sat out the deal spree in 2015, Mollenkopf is now making use of his company’s more than $30 billion in cash reserves, most of which is held overseas.“There just isn’t enough mobile growth to be had –- they are already the dominant chip supplier and licenser of intellectual property in an industry where the product is being commoditized and volume growth is moderating,” said Sid Parakh, a fund manager at Becker Capital Management, which owns Qualcomm stock. “As a long-term investor, I would much rather have a more diverse company that has the potential to participate in new markets and probably grow significantly more than it would in a mobile-only world.”
NXP is projected to report 2016 sales of $9.48 billion, the average of analysts’ estimates from data compiled by Bloomberg. By revenue, that makes it less than half the size of Qualcomm, which will report sales of $23.2 billion this year, according to analysts. Still, the Dutch company has averaged about 11 percent growth over the past three years, while the U.S. chipmaker’s sales declined 5 percent last year, a collapse from a revenue increase of 30 percent in 2013.
Connected Devices
Like other chipmakers, Qualcomm is targeting what’s called the Internet of Things, the addition of connections and computing power to everything from washing machines to trucks and industrial equipment. The company has pitched prospective new customers with modified mobile-phone chips that it says offer the easiest way to add electronic capabilities to a broader range of devices. That push is in its early stages, with wins in areas such as automotive, where Qualcomm’s chips power entertainment devices and cell-phone connections to cars.“Automotive and industrial are Internet of Things verticals that we see as more profitable for semiconductors, and this is precisely the exposure that Qualcomm would gain with an NXP deal,” Cowen & Co. analyst Timothy Arcuri wrote in a note. “Qualcomm could become the dominant player in connected industrial and automotive applications.”
By buying NXP, which started off life as Koninklijke Philips NV’s chip unit, Qualcomm is taking on the risk of merging with a company that’s in the process of integrating its own acquisition of Freescale. That $16 billion transaction was completed in December. NXP owns factories and produces some of its own chips -- something Qualcomm has avoided by outsourcing its manufacturing -- and has about 44,000 employees, compared with about 33,000 for Qualcomm.
https://www.bloomberg.com/news/articles/2016-10-27/qualcomm-to-buy-nxp-semiconductors-for-47-billion-in-cash
Wednesday, October 19, 2016
Intel has sparkling Q3
Intel’s Q3 revenues grew 9.1% y-o-y and profit grew 21% y-o-y Gross margin was 64.8% and operating profit was $5.1 billion.
The PC business saw sales increase 21% y-o-y, and 5% q-o-q to $8.9 billion.
Data centre grew 13% q-o-q and 10% y-o-y to $4.5 billion.
IoT grew 20% q-o-q and 19% y-o-y to $689 million
Flash grew 17% q-o-q and shrank 1% y-o-y to $649 million.
Security was flat q-o-q and up 6% y-o-y at $537 million.
Programmables (Altera) were down 9% q-o-q at $425 million.
Q4 revenues are expected to be $15.7 billion with a gross margin of 63%.
“We’re executing well, and these results show Intel’s continuing transformation to a company that powers the cloud and billions of smart, connected devices, ” said CEO Brian Krzanich.
“It was an outstanding quarter, and we set a number of new records across the business,” said Brian Krzanich, Intel CEO. “In addition to strong financials, we delivered exciting new technologies while continuing to align our people and products to our strategy.”
http://www.electronicsweekly.com/news/business/intel-sparkling-q3-2016-10/
The PC business saw sales increase 21% y-o-y, and 5% q-o-q to $8.9 billion.
Data centre grew 13% q-o-q and 10% y-o-y to $4.5 billion.
IoT grew 20% q-o-q and 19% y-o-y to $689 million
Flash grew 17% q-o-q and shrank 1% y-o-y to $649 million.
Security was flat q-o-q and up 6% y-o-y at $537 million.
Programmables (Altera) were down 9% q-o-q at $425 million.
Q4 revenues are expected to be $15.7 billion with a gross margin of 63%.
“We’re executing well, and these results show Intel’s continuing transformation to a company that powers the cloud and billions of smart, connected devices, ” said CEO Brian Krzanich.
“It was an outstanding quarter, and we set a number of new records across the business,” said Brian Krzanich, Intel CEO. “In addition to strong financials, we delivered exciting new technologies while continuing to align our people and products to our strategy.”
http://www.electronicsweekly.com/news/business/intel-sparkling-q3-2016-10/
Tuesday, October 18, 2016
China to produce 3D NAND chips as early as end-2017
Yangtze River Storage Technology (YRST) will start
operating China's first 12-inch fab for the manufacture of NAND flash
and DRAM memory at the end of 2016, and is expected to produce the
region's first homegrown 3D NAND flash memory a year later, according to
industry sources.
YRST will be able to make 32-layer 3D NAND flash chips as early as end-2017, said the sources.
Construction
of YRST's 12-inch fab will be in three phases, with investment totaling
US$24 billion, the sources indicated. The company will complete the
first-phase construction at the end of 2016, followed by the second
phase in 2018 and the third phase in 2019, the sources said.
The
target production capacity at YRST's 12-inch fab is set at 300,000
wafers monthly, the sources noted. The facility will also be engaged in
the manufacture of DRAM memory, and could play a role in Tsinghua
Unigroup's planned strategic alliance with Micron Technology, the
sources said.
YRST was formed with goverment subsidies
and investments from several government-owned groups, and built based on
Wuhan Xinxin Semiconductor Manufacturing's (XMC) 12-inch IC R&D and
manufacturing capability and "continue to develop XMC's presence in the
memory-chip market," XMC disclosed in August. XMC added it has become
YRST's wholly-owned subsidiary since 2016.
In fact,
YRST took over XMC's role as China's main production base for DRAM and
NAND flash memory, industry sources identified. XMC is now in charge of
making China's homegrown NOR flash as well as logic chips, with monthly
capacity of around 30,000 12-inch wafers.
YRST will use
Spansion's technology to produce 3D NAND chips based on a license
agreement between Spansion and XMC, the sources said.
http://www.digitimes.com/news/a20161017PD204.html
Monday, October 17, 2016
16nm FinFET FPGAs in production, says Xilinx
Less than a year after first ship of all devices, open order entry
for production devices is available this quarter,” said the company.
Xilinx UltraScale+ FPGA family is a FinFET-based programmable technology which is now available at 14nm or 16nm process nodes.
This includes Kintex, Virtex UltraScale+ FPGAs and Zynq UltraScale+ MPSoCs.
Moshe Gavrielov, president & CEO at Xilinx, writes:
http://www.electronicsweekly.com/news/16nm-finfet-fpgas-production-says-xilinx-2016-10/
Xilinx UltraScale+ FPGA family is a FinFET-based programmable technology which is now available at 14nm or 16nm process nodes.
This includes Kintex, Virtex UltraScale+ FPGAs and Zynq UltraScale+ MPSoCs.
Moshe Gavrielov, president & CEO at Xilinx, writes:
“This production milestone further stretches our greater than one year lead in 16nm product delivery.”
http://www.electronicsweekly.com/news/16nm-finfet-fpgas-production-says-xilinx-2016-10/
Friday, October 14, 2016
Murata buys French capacitor tech firm
Murata expects the addition of IPDiA’s integrated capacitor arrays to strengthen its core business within the mobile communications market, but also to expand into new applications within the automotive and medical markets.
“Combining IPDiA’s 3D silicon capacitor technologies with Murata’s current technologies and product portfolio will enable us to expand our combined offering and meet our customers’ high reliability requirements, such as high temperature or high voltage, in automotive and other demanding markets”, said Toru Inoue, executive vice president of Murata’s components business.
IPDiA, which is based in Caen, was formed in 2009 from an existing NXP facility and technology. It has around 130 employees.
According to Franck Murray, IPDiA CEO: “The company’s patented technology has enabled silicon passive components to be considered as a superior solution in specific markets where high performance and miniaturisation are required.”
The French firm specialises in making silicon capacitors for high voltage and high temperature applications.
Compared with multi-layer ceramic capacitor (MLCC), the MOS technology used by IPDiA offers a reliability of 84,000 hours operation at 250°C.
The transaction is expected to close before the end of October.
http://www.electronicsweekly.com/uncategorised/murata-buys-french-capacitor-tech-firm-2016-10/
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