Samsung Electronics has agreed to supply
Google with its advanced three-dimensional NAND flash (3D NAND) solid
state drives (SSD).
This deal is considered another huge boost
for Samsung to go ahead of its chief overseas rivals in the race for
development of 3D NAND technology, said officials.
"The agreement
calls for Samsung to supply 3D NAND SSD products for Google
datacenters. Samsung is in discussions with Google to end some minor
differences such as guaranteed shipments and pricing," an executive from
a Samsung Electronics partner company told The Korea Times, Tuesday.
The exact value of the deal is unknown, but the executive said the worth is "sizeable."
A
Samsung Electronics spokesman declined to comment on the agreement.
Google representatives were not immediately available for comment
either.
The deal comes a few days after its chief U.S.-based
memory chip rival Micron Technology teamed up with Intel for their new
3D NAND technology.
Samsung's factory in Xian, China ― the main
location to fabricate 3D NAND chips ― will increase its annual shipments
of 3D NAND chips to 960,000 wafers this year, from last year's
estimated 480,000, according to research firms.
From a technology
point of view, 3D NAND is a type of flash memory that stacks memory die
on top of each other within a single package using specialized
interconnectors. The vertical stacking allows for a significantly higher
density of memory cells and improves performance and reliability.
The
3D NAND is a breakthrough in overcoming the density limit currently
facing the planar (2D) NAND architecture and floating gates used in
conventional flash memory, as well as yielding speed and endurance
improvements.
3D NAND SSDs for datacenters have higher margins
than those used in portable devices such as notebooks and smartphones ad
datacenters need more storage capacity and faster speeds for
data-processing.
In a related note, Samsung previously agreed
with Amazon to export its 3D NAND technology, while Apple was testing
the quality of Samsung 3D NAND SSDs as the iPhone designer also intends
to use Samsung products. Facebook is another target for Samsung to
promote its 3D NAND SSDs.
Samsung seeks to improve its 3D NAND
technology as the world's biggest memory chip producer believes it will
be an important growth driver.
In August 2013, Samsung released
the first-generation SSDs for datacenters and the company released the
3D NAND SSDs in October last year.
While Samsung has first mover
advantage, SanDisk, Toshiba and SK hynix are also well positioned to
benefit from the industry's shift and come up with their 3D NAND
offerings.
Samsung, however, say it will be several generations
ahead and will have solved the teething problems of controller design
and other architectural issues.
http://www.koreatimes.co.kr/www/news/tech/2015/03/133_176227.html
Tuesday, March 31, 2015
Monday, March 30, 2015
Intel opens acquisition discussions with Altera
Altera, a maker of chips for networks and cars, would be Intel’s biggest purchase ever
http://www.wsj.com/articles/intel-in-talks-to-buy-altera-1427485172Friday, March 27, 2015
New 3D NAND flash will triple capacity of SSDs, Intel and Micron say
Standard consumer SSDs will increase up to an astounding 10TB of storage, thanks to a new type of 3D NAND flash memory that Intel and Micron introduced Thursday morning.
The two companies, longtime joint partners in NAND flash development, said the breakthrough isn’t to make larger flash chips, but thicker ones. Much like Manhattan, when you’re out of space, the only way to go is up.
Executives at the two companies said that by stacking the NAND they can greatly increase the capacity. The new 3D NAND technology stacks flash cells vertically in 32 layers to achieve a 256Gbit multilevel cell (MLC) and 384Gbit triple-level cell (TLC) die that fit within a standard package. Both say this approach will yield greater efficiency and lower the cost too.
Pack a bunch of those together, and the end result is a tripling of capacity over today’s drives, at least initially. For a standard 2.5-inch SATA drive that means up to 10TB of space; for the M.2 drive type used by most laptops, the 3D NAND will boost capacities up to 3.5GB.
"This 3D NAND technology has the potential to create fundamental market shifts," said Brian Shirley, Vice President of Memory Technology and Solutions at Micron Technology, in a statement. "The depth of the impact that flash has had to date—from smartphones to flash-optimized supercomputing—is really just scratching the surface of what's possible."
The chips are already sampling at both companies, and Intel said it expects to offer products for sale using the 3D chips in the later half of this year. But how long will the chips last before they fail? That information wasn’t disclosed.
Intel did say it expects to offer products using the new NAND chips this year.
Why this matters: SSDs have drastically impacted computing—but even as prices have dropped, the capacities still lag far behind those of traditional magnetic hard drives. This 3D NAND announcement puts SSDs on a density increase that could very well see it eclipsing hard drives, at least for most people’s needs.
http://www.pcworld.com/article/2902246/new-3d-nand-flash-will-triple-capacity-of-ssds-intel-and-micron-say.html
Thursday, March 26, 2015
Intel's Deep Learning Play: Next-Gen Xeon Phi Could Challenge NVIDIA GPUs
Intel disclosed new technical details about its next -generation Xeon Phi processor to a small group of technology analysts-journalists at one of its Hillsboro sites this week. First revealed last year,
the “Knights Landing” chip is expected to ship later this year, however
Intel showed pre-production parts parts running in a Hillsboro test
lab. The briefing included a whiteboard design walkthrough by Avinash
Sodani, Knights Landing Chief Architect at Intel, a product update by
Hugo Saleh, Marketing Director of Intel’s Technical Computing Group, an
interactive technical Q&A and a lab demo of a Knights Landing system
running on an Intel reference-design system. The architectural
differences between Knights Landing and prior Phi products is
substantial and should translate to much easier adoption and a broader
set of commercial applications, including areas like deep learning,
genomics, databases and general purpose containerized (Docker)
workloads. Unlike more specialized processors, Intel describes Knights
Landing as taking a “holistic approach” to new breakthrough
applications.
Unlike the current generation Phi design, which operates as a coprocessor, Knights Landing incorporates x86 cores and can directly boot and run standard operating systems and application code without recompilation. The test system, which resembled a standard server board, with socketed CPU and memory modules was running a stock Linux distribution. This is made possible by the inclusion of a modified version of the Atom Silvermont x86 cores as part of each Knights Landing ’tile’: the chip’s basic design unit consisting of dual x86 and vector execution units alongside cache memory and intra-tile mesh communication circuitry. Each multi-chip package includes the a processor with 30 or more (rumored up to 36) tiles and eight high-speed memory chips. Although it wouldn’t offer specifics, Intel said the on-package memory, totalling 16GB, is made by Micron with custom I/O circuitry and might be a variant of Micron’s announced, but not yet shipping Hybrid Memory Cube, but this wasn’t confirmed. The high-speed memory is conceptually similar to the DDR5 devices used on GPUs like NVIDIA's NVDA -0.58% Tesla.

Intel is long on device-level technology details, but short on specifics regarding the types of business problems, applications and users Phi targets. So far, Phi has been used by HPC applications like scientific simulations, modeling and design, with product announcements often happening during supercomputing conferences. Yet as NVIDIA demonstrated at GTC,, the opportunities for compute hardware supporting wide, vector operations built for highly parallelized algorithms, whether general purpose GPUs or now Xeon Phi, extends far beyond the supercomputer niche. As I previously discussed, NVIDIA has morphed its GPU architecture into a powerful engine for calculating deep learning neural network algorithms that is now being applied to accelerate SQL database operations and analytics.
The internals of a GPU and Xeon Phi are much different, however both share many common traits: dozens (Phi) to thousands (GPU) of lower performance (Phi) to relatively simple cores (GPU), vector processing units and very high-speed local memory and buses. The creative exploitation of this capability isn’t limited to scientific or graphics calculations and seems limited only by the imagination of developers. But on this front, Intel didn’t have encouraging news. Although Saleh mentioned deep learning as a potential application, he couldn’t point to specific customers or researchers using Phi for anything but traditional scientific HPC problems.
Unlike NVIDIA, which announced the price and availability of a Titan X development box designed
for researchers exploring GPU applications to deep learning, Intel
wouldn’t share details about when OEM partners will have Knights Landing
systems, whether any ould be sized and priced for individual
developers, nor a timeline for what Saleh characterized as a Phi
developer program, which will include access to hardware, updated
software tools and training materials. But developer resources, outreach
and evangelism are critical to any success Phi is to have, particularly
since the hardware itself represents a substantial departure from the
standard x86 microarchitecture, and here NVIDIA has a big head start.
Yet thinking of Phi as an alternative GPU or vector processor is wrong since it’s actually a hybrid that includes dozens of full-fledged 64-bit x86 cores. This unique design, if used right, could significantly accelerate certain parallelizable application categories besides HPC simulation like deep learning and data analytics that use vector calculations, while offering drop-in computational offload for standard x86 code.
Read more:
http://www.forbes.com/sites/kurtmarko/2015/03/25/intels-deep-learning-play/
Unlike the current generation Phi design, which operates as a coprocessor, Knights Landing incorporates x86 cores and can directly boot and run standard operating systems and application code without recompilation. The test system, which resembled a standard server board, with socketed CPU and memory modules was running a stock Linux distribution. This is made possible by the inclusion of a modified version of the Atom Silvermont x86 cores as part of each Knights Landing ’tile’: the chip’s basic design unit consisting of dual x86 and vector execution units alongside cache memory and intra-tile mesh communication circuitry. Each multi-chip package includes the a processor with 30 or more (rumored up to 36) tiles and eight high-speed memory chips. Although it wouldn’t offer specifics, Intel said the on-package memory, totalling 16GB, is made by Micron with custom I/O circuitry and might be a variant of Micron’s announced, but not yet shipping Hybrid Memory Cube, but this wasn’t confirmed. The high-speed memory is conceptually similar to the DDR5 devices used on GPUs like NVIDIA's NVDA -0.58% Tesla.
Intel is long on device-level technology details, but short on specifics regarding the types of business problems, applications and users Phi targets. So far, Phi has been used by HPC applications like scientific simulations, modeling and design, with product announcements often happening during supercomputing conferences. Yet as NVIDIA demonstrated at GTC,, the opportunities for compute hardware supporting wide, vector operations built for highly parallelized algorithms, whether general purpose GPUs or now Xeon Phi, extends far beyond the supercomputer niche. As I previously discussed, NVIDIA has morphed its GPU architecture into a powerful engine for calculating deep learning neural network algorithms that is now being applied to accelerate SQL database operations and analytics.
The internals of a GPU and Xeon Phi are much different, however both share many common traits: dozens (Phi) to thousands (GPU) of lower performance (Phi) to relatively simple cores (GPU), vector processing units and very high-speed local memory and buses. The creative exploitation of this capability isn’t limited to scientific or graphics calculations and seems limited only by the imagination of developers. But on this front, Intel didn’t have encouraging news. Although Saleh mentioned deep learning as a potential application, he couldn’t point to specific customers or researchers using Phi for anything but traditional scientific HPC problems.
Source: Kurt Marko
Yet thinking of Phi as an alternative GPU or vector processor is wrong since it’s actually a hybrid that includes dozens of full-fledged 64-bit x86 cores. This unique design, if used right, could significantly accelerate certain parallelizable application categories besides HPC simulation like deep learning and data analytics that use vector calculations, while offering drop-in computational offload for standard x86 code.
Read more:
http://www.forbes.com/sites/kurtmarko/2015/03/25/intels-deep-learning-play/
Wednesday, March 25, 2015
Organic LEDs, carbon nanotubes may light up future fabrics
With the emergence of wearable electronics that monitor fitness and
health, there is a growing need for more flexible light-emitting
devices. One option that researchers have been interested in is
developing fabrics with integrated light-emitting devices.
Unfortunately, fabrics themselves are not a suitable surface for current
light-emitting materials. However, a team of scientists have found a
way around this issue by integrating the light-emitting devices directly
into fabrics using a new technology: light-emitting device fibers.
These research team, based in China, worked with polymer light-emitting electrochemical cells (PLECs). Like many other light-emitting devices, PLECs have a structure that is composed of two metal electrodes connected to a thin organic layer that acts as a semiconductor. Because PLECs have mobile ions incorporated into the semiconductor, they have many benefits compared to other light-emitting diodes (LEDs): low operating voltage, high efficiency in converting electrons to photons, and high power efficiency. PLECs are also a good option because they do not require the use of metals that are sensitive to air and they can be used on rougher surfaces; these characteristics make them suitable for large-scale manufacturing.
These fiber-shaped PLECs have a coaxial structure with four layers. Using a solution-based processing, a steel wire, which acts as the base of this fiber, is dip-coated with a thin layer of ZnO nanoparticles. This layer has two key functions: protecting the light-emitting layer that's applied next; and decreasing the leakage of the current, thus enhancing current efficiency.
Next, the electroluminescent polymer layer is deposited onto the wire using dip-coating. Finally, a sheet of aligned carbon nanotubes is wrapped around the bundle using a dry-drawn form of spinnable carbon nanotubes. Because the carbon nanotubes were highly aligned, they provided the fiber with high electrical conductivities. Imaging revealed that the fibers had a uniform diameter and a smooth outer surface.
The scientists who created these fibers determined the lifetime of the devices. They found that the fibers gradually light up over a 21-minute period and gradually dim over a four-hour period; in these studies, the light emitted by the fibers was blue. The fiber lit up when a voltage of 5.6V was applied and reached a peak intensity at 13V. When the fiber is pre-charged, it displays a rapid turn-on response that is similar to conventional LEDs.
The brightness of the light emitted by the fibers was almost entirely independent of viewing angle. When the fibers were bent, they maintained their brightness above 90 percent and no obvious damage was observed. Though only blue light was explored in these studies, the team believes other colors could be displayed as well.
Together, these studies demonstrate that these light-emitting fibers can be woven into fabrics without compromising their luminescence, which makes them a promising candidate for the development of wearable electronics and other fabric-based electronics in the future.
http://arstechnica.com/science/2015/03/organic-leds-carbon-nanotubes-may-light-up-future-fabrics/
These research team, based in China, worked with polymer light-emitting electrochemical cells (PLECs). Like many other light-emitting devices, PLECs have a structure that is composed of two metal electrodes connected to a thin organic layer that acts as a semiconductor. Because PLECs have mobile ions incorporated into the semiconductor, they have many benefits compared to other light-emitting diodes (LEDs): low operating voltage, high efficiency in converting electrons to photons, and high power efficiency. PLECs are also a good option because they do not require the use of metals that are sensitive to air and they can be used on rougher surfaces; these characteristics make them suitable for large-scale manufacturing.
These fiber-shaped PLECs have a coaxial structure with four layers. Using a solution-based processing, a steel wire, which acts as the base of this fiber, is dip-coated with a thin layer of ZnO nanoparticles. This layer has two key functions: protecting the light-emitting layer that's applied next; and decreasing the leakage of the current, thus enhancing current efficiency.
Next, the electroluminescent polymer layer is deposited onto the wire using dip-coating. Finally, a sheet of aligned carbon nanotubes is wrapped around the bundle using a dry-drawn form of spinnable carbon nanotubes. Because the carbon nanotubes were highly aligned, they provided the fiber with high electrical conductivities. Imaging revealed that the fibers had a uniform diameter and a smooth outer surface.
The scientists who created these fibers determined the lifetime of the devices. They found that the fibers gradually light up over a 21-minute period and gradually dim over a four-hour period; in these studies, the light emitted by the fibers was blue. The fiber lit up when a voltage of 5.6V was applied and reached a peak intensity at 13V. When the fiber is pre-charged, it displays a rapid turn-on response that is similar to conventional LEDs.
The brightness of the light emitted by the fibers was almost entirely independent of viewing angle. When the fibers were bent, they maintained their brightness above 90 percent and no obvious damage was observed. Though only blue light was explored in these studies, the team believes other colors could be displayed as well.
Together, these studies demonstrate that these light-emitting fibers can be woven into fabrics without compromising their luminescence, which makes them a promising candidate for the development of wearable electronics and other fabric-based electronics in the future.
http://arstechnica.com/science/2015/03/organic-leds-carbon-nanotubes-may-light-up-future-fabrics/
Tuesday, March 24, 2015
IBM to share technology with China in strategy shift: CEO
(Reuters) - IBM Corp will share technology with Chinese firms and will actively help build China's industry, CEO Virginia Rometty said in Beijing as she set out a strategy for one of the foreign firms hardest hit by China's shifting technology policies.
IBM must help China build its IT industry rather than viewing the country solely as a sales destination or manufacturing base, Rometty said at the China Development Forum, an annual Chinese government-sponsored conference bringing together business executives and China's ruling elite.
"If you're a country, as China is, of 1.3 billion people you would want an IT industry as well," the chief executive said on Monday. "I think some firms find that perhaps frightening. We, though, at IBM ... find that to be a great opportunity."
Rometty's remarks were among the clearest acknowledgements to date by a high-ranking foreign technology executive that companies must adopt a different tack if they are to continue in China amid growing political pressure.
A number of U.S. technology companies operating in China are forming alliances with domestic operators, hoping a local partner will make it easier to operate in the increasingly tough environment for foreign businesses.
China has been pushing for the use of more Chinese and less foreign-made technology, to grow its own tech sector and in response to ex-U.S. National Security Agency contractor Edward Snowden's leaks about U.S. cyber surveillance.
IBM's sales in China have stabilized after a sharp drop that began in the third quarter of 2013 following Snowden's revelations. The Armonk, New York-based company reported a 1 percent slide in revenue in China during the fourth quarter of 2014, compared with the prior year.
IBM's new approach allows Chinese companies to build everything from semiconductor chips and servers based on IBM architecture, to the software that runs on those machines.
Last week IBM said Suzhou PowerCore Technology Co will begin producing a version of IBM's Power8 chip to run on Chinese-made servers. Its POWER line of processors is often used for intensive calculations in financial services, where Chinese banks have been required by new government regulations to use more domestic vendors.
The U.S. company had already announced a series of partnerships with Chinese vendors and now packages its database software with products from Inspur, a server hardware maker and IBM rival, and has also struck agreements with Youyou, a Beijing-based software firm.
Other vendors are making similar efforts.
SAP SE Greater China head Mark Gibbs for instance said in October the company sought to be a "complementary player to the Chinese market” by selling its software on hardware made by Lenovo Inc and Huawei Technologies.
http://www.reuters.com/article/2015/03/23/us-china-tech-ibm-idUSKBN0MJ14X20150323
Monday, March 23, 2015
Chip Gear Makers Look Less Fab
Samsung may be squeezing more life out of the expensive equipment it
uses to fabricate semiconductor products. That may be bad news for the
firms that depend on selling new gear, but perhaps not as bad as the
market is making out.
Read more:
http://www.wsj.com/articles/chip-gear-makers-look-less-fab-heard-on-the-street-1427043217
Read more:
http://www.wsj.com/articles/chip-gear-makers-look-less-fab-heard-on-the-street-1427043217
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